AD8304 datasheet(13/20 Pages) AD

13 / 20 page

REV. A

AD8304

–13–

The use of a capacitor at the VLOG Pin to create a single-pole

filter has already been mentioned. The small added cost of the few

external components needed to realize a multipole filter is often

justified in a high performance measurement system. Figure 8

shows a Sallen-Key filter structure. Here, the resistor needed at

the front of the network is provided entirely by the accurate 5 k

Ω

present at the VLOG output; RB will have a similar value. The corner

frequency and Q (damping factor) are determined by the capacitors

CA and CB and the gain G = (RA + RB)/RB. A suggested starting

point for choosing these components using various gains is pro-

vided in Table IV; the values shown are for a 1 kHz corner (also

see TPC 12). This frequency can be increased or decreased by

scaling the capacitor values. Note that RD, G, and the capacitor ratio

CA/CB should not deviate from the suggested values to maintain the

shape of the ac amplitude response and pulse overshoot provided

by the values shown in this table. In all cases, the roll-off rate above

the corner is 40 dB/dec.

PDB

BIAS

VREF

VPDB

VSUM

INPT

VSUM

VNEG

~10k

ACOM

VPS2

PWDN

VPS1

VREF

VLOG

BFIN

BFNG

TEMPERATURE

COMPENSATION

VOUT

0.5V

IPD

750k

10nF

1nF

VOUT

NC = NO CONNECT

Figure 8. Two-Pole Low-Pass Filter

Table IV. Two-Pole Filter Parameters for 1 kHz Cutoff

Frequency

(k )(k )G

(V/decade)

(k )

(nF)

open

0.2

11.3

0.4

6.02

2.5

0.5

12.1

1.0

10.0

The corner frequency can be adjusted by scaling capacitors C A and CB. For

example, to reduce the corner frequency to 100 Hz, raise the values of C A and

CB by 10

*See TPC 12.

Operation in Comparator Modes

In certain applications, the need may arise to generate a logical

output when the input current has reached a certain value. This

can be easily addressed by using a fraction of the voltage refer-

ence to provide the setpoint (threshold) and using the buffer

without feedback in a comparator mode, as illustrated in Figure 9.

Since VLOG runs from ground up to 1.6 V maximum, the 2 V

reference is more than adequate to cover the full dynamic range

of IPD. Note that the threshold for an increasing IPD is unchanged,

while the release point for decreasing currents is 5 dB below

this. Raising RH to 5 M

Ω reduces the hysteresis to 0.5 dB, or it

may be increased using a lower value for RH.

PDB

BIAS

VREF

VPDB

VSUM

INPT

VSUM

VNEG

~10k

ACOM

VPS2

PWDN

VPS1

VREF

VLOG

BFIN

BFNG

TEMPERATURE

COMPENSATION

VOUT

0.5V

IPD

750

10nF

1nF

NC = NO CONNECT

VOUT

Figure 9. Using the Buffer as a Comparator

Using a Negative Supply

Most applications of the AD8304 will require only a single supply

of 3.0 V to 5.5 V. However, to provide further versatility, dual

supplies may be employed, as illustrated in Figure 10.

The use of a negative supply, VN, allows the summing node to

be placed exactly at ground level, because the input transistor

(Q1 in Figure 1) will have a negative bias on its emitter. VN may

be as small as –0.5 V, making the VCE the same as for the default

case. This bias need not be accurate, and a poorly defined source

can be used.

A larger supply of up to –5V may be used. The effect on scaling

is minor. It merely moves the intercept by ~0.01 dB/V. Accord-

ingly, an uncertainty of 0.2 V in VN would result in a negligible

error of 0.002 dB. The slope is unaffected by VN. The log lin-

earity will be degraded at the extremes of the dynamic range as

indicated in Figure 11. The bias current, buffer output (and its

load) current, and the full IPD all have to be absorbed by this

negative supply, and its supply capacity must be ensured for the

maximum current condition.

PDB

BIAS

VREF

VPDB

VSUM

INPT

VSUM

VNEG

~10k

ACOM

VPS2

PWDN

VPS1

VREF

VLOG

BFIN

BFNG

TEMPERATURE

COMPENSATION

VOUT

0.5V

IPD

750

1nF

NC = NO CONNECT

VOUT

VN (–0.5V TO –3V)

Figure 10. Using a Negative Supply

With the summing node at ground, the AD8304 may now be used

as a voltage-input log amp, simply by inserting a suitably scaled

resistor from the voltage source to the INPT Pin. The logarith-

mic accuracy for small voltages is limited by the offset of the JFET

op amp, appearing between this pin and VSUM.

The use of a negative supply also allows the output to swing below

ground, thereby allowing the intercept to correspond to a midrange

value of IPD. However, the voltage VLOG remains referenced to the

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