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CTL0233NS-R3 Datasheet(PDF) 1 Page - CT Micro International Corporation |
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CTL0233NS-R3 Datasheet(HTML) 1 Page - CT Micro International Corporation |
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1 / 11 page  CT Micro Rev 3 Proprietary & Confidential Page 1 Jun, 2015 CTL0233NS-R3 N-Channel Enhancement MOSFET Package Outline Schematic Features •••• Drain-Source Breakdown Voltage VDSS 30 V •••• Drain-Source On-Resistance RDS(ON) 92m Ω, at VGS= 10V, ID= 2.5A RDS(ON) 142m Ω, at VGS= 4.5V, ID= 2.0A •••• Continuous Drain Current at TA=25 ℃ID = 2.3A •••• Advanced high cell density Trench Technology •••• RoHS Compliance & Halogen Free Applications •••• Power Management •••• Lithium Ion Battery •••• LCD Display inverter •••• Load Switch Description The CTL0233NS-R3 is the N-Channel logic enhancement mode power field effect transistors, using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. Gate Source Drain Gate Drain Source |
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