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CLC425AMC Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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CLC425AMC Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 9 page  20 Ω 200 Ω 600 Ω 50 Ω 50 Ω 40k Ω 50k Ω 180 Ω 20 Ω 10 Ω Pi Mini-Circuits T16-6T Po Av=+10 Av=-3 806 Ω 50 Ω 1:4 CLC425 CLC404 0.1 µF 1pF Gain = Po Pi = 35.6dB Figure 14: Very Low Noise Figure Amplifier Rf = 1k Ω R1 = 45.3 Ω R = 681 Ω Rg = 50 Ω R2 = 200 Ω Vo Vin CLC425 L = 0.1 µHC = 470pF C1 = 2200pF V V sC R sC R R R RR sLR s LCR R sL R R R R o in o f f g g gg g K = + + () + − + ++ ()+ 11 11 2 22 2 1 1 VV K sR C K R R oin o a o f g ≅= + ;1 R RR R R RR b a f g a || , ≥>> Rf Rb Ra Rg Vo Vin CLC425 R C 50 Ω 50 Ω Rf Rg CLC425 R1 R2 C2 C1 Figure 17: Low Noise Magnetic Media Equalizer K R R o f g =+ 1 Rf Rb Rg CLC425 Vin Vout Cf Figure 18: Equalizer Frequency Response Low-Noise Phase-Locked Loop Filter The CLC425 is extremely useful as a Phase-Locked Loop filter in such applications as frequency synthesiz- ers and data synchronizers. The circuit of Figure 19 implements one possible PLL filter with the CLC425. Figure 19: Phased-Locked Loop Filter Decreasing the Input Noise Voltage The input noise voltage of the CLC425 can be reduced from its already low 1.05nV/ √Hz by slightly increasing the supply current. Using a 50k Ω resistor to ground on pin 8, as shown in the circuit of Figure 14, will increase the quiescent current to ≈17mA and reduce the input noise voltage to < 0.95nV/ √Hz. Printed Circuit Board Layout Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and possible circuit oscillation, see OA-15 for more informa- tion. National suggests the CLC730013-DIP, CLC730027-SOIC, or CLC730068-SOT evaluation board as a guide for high-frequency layout and as an aid in device testing and characterization. Low Noise Integrator The CLC425 implements a deBoo integrator shown in Figure 15. Integration linearity is maintained through positive feedback. The CLC425's low input offset voltage and matched inputs allowing bias current cancellation provide for very precise integration. Stabil- ity is maintained through the constraint on the circuit elements. Figure 15: Low Noise Integrator High-Gain Sallen-Key Active Filters The CLC425 is well suited for high-gain Sallen-Key type of active filters. Figure 16 shows the 2nd order Sallen-Key low pass filter topology. Using component predistortion methods as discussed in OA-21 enables the proper selection of components for these high-frequency filters. Figure 16: Sallen-Key Active Filter Topology Low Noise Magnetic Media Equalizer The CLC425 implements a high-performance low-noise equalizer for such applications as magnetic tape channels as shown in Figure 17. The circuit combines an integrator with a bandpass filter to produce the low- noise equalization. The circuit's simulated frequency response is illustrated in Figure 18. http://www.national.com 8 |
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