CLC449AMC datasheet(6/12 Pages) NSC

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Figure 5: DC Offset Model

DC Design (Output Loading)

RL, Rf, and Rg load the op amp output. The equivalent

closed-loop load impedance seen by the output in Figure

5 is:

• RL_eq = RL || (Rf + Req2), non-inverting gain

• RL_eq = RL || Rf, inverting gain

RL_eq

needs to be kept large enough so that the

minimum available output current can produce the

required output voltage swing.

Capacitive Loads

Capacitive loads, such as found in A/D converters,

require a series resistor (Rs) in the output to improve set-

tling performance. The

Rs and Settling Time vs. CL plot

in the

Typical Performance Characteristics section

provides the information for selecting this resistor.

Also, use a series resistor to reduce the effects of

reactive loads on amplifier loop dynamics. For instance,

driving coaxial cables without an output series resistor

may cause peaking or oscillation.

Transmission Line Matching

One method for matching the characteristic impedance of

a transmission line is to place the appropriate resistor at

the input or output of the amplifier. Figure 6 shows the

typical circuit configurations for matching transmission

lines.

Figure 6: Transmission Line Matching

In non-inverting gain applications, Rg is connected directly

to ground.

The resistors R1, R2, R6, and R7

are equal to the characteristic impedance, Zo, of the

transmission line or cable.

In inverting gain applications, R3 is connected directly to

ground.

The resistors R4, R6, and R7 are equal

to Zo. The parallel combination of R5 and Rg is also equal

to Zo.

The input and output matching resistors attenuate the

signal by a factor of 2, therefore additional gain is needed.

Matching the output transmission line over greater

frequency ranges is accomplished by placing C6 in

parallel with R6, reducing the output impedance to

compensate for the internal increase of the op-amp’s out-

put impedance with frequency.

Thermal Design

To calculate the power dissipation for the CLC449,

follow these steps:

• Calculate the no-load op amp power:

Pamp = Icc • (Vcc – Vee)

• Calculate the output stage’s RMS power:

Po = (Vcc – Vload) • Iload

where Vload and Iload are the RMS voltage and

current across the external load.

• Calculate the total op amp RMS power:

Pt = Pamp + Po

To calculate the maximum allowable ambient tempera-

ture, solve the following equation: Tamb = 175 – Pt • θJA,

where

θJA is the thermal resistance from junction to

ambient in °C/W and Tamb is in °C. Thermal resistance

for the various packages are found in the

Package

Thermal Resistance section.

Dynamic Range (Input /Output Protection)

Input ESD diodes are present on all connected pins for

protection from static voltage damage. For a signal that

may exceed the supply voltages, we recommend using

diode clamps at the amplifier’s input to limit the signals to

less than the supply voltages.

Dynamic Range (Input /Output Levels)

The

Electrical Characteristics section contains the

Common-Mode Input Range and Output Voltage

Range; these voltage ranges scale with the supplies.

Output Current is also specified in the

Electrical

Characteristics section.

Unity gain applications are limited by the Common-Mode

Input Range. At greater non-inverting gains, the Output

Voltage Range becomes the limiting factor. Inverting gain

applications are limited by the Output Voltage Range.

For transimpedance or inverting gain applications, the

current (Iinv) injected at the inverting input pin of the op

amp needs to be:

where Vmax is the Output Voltage Range.

The voltage ranges discussed above are achieved as

long as the equivalent output load is large enough so that

the output current can produce the required output

voltage swing. See the

DC Design (Output Loading)

sub-section for details.

Dynamic Range (Intermods)

For RF applications, the CLC449 specifies a third

order intercept of 30dBm at 70MHz and Po = 10dBm.

Req1

Req2

CLC449

IBI

IBN

Vos

CLC449

V2 +-

inv

max

≤

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