Features

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Output clamping with fast recovery

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0.0025% settling in 25ns (32ns max.)

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Low power, 170mW

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Low distortion. -50dBc at 20MHz

Applications

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Output clamping applications

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High-accuracy A/D systems (12-14 bits)

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High-accuracy D/A converters

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Pulse amplitude modulation systems

General Description

CLC502

Clamping, Low-Gain Op Amp with Fast 14-bit Settling

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June 1999

Package Dimensions

Pinout

DIP & SOIC

© 1999 National Semiconductor Corporation

http://www.national.com

Printed in the U.S.A.

The CLC502 is available in several versions to meet a variety of

requirements. A three-letter suffix determines the version:

CLC502AJP

-40°C to +85°C

8-pin plastic DIP

CLC502AJE

-40°C to +85°C

8-pin plastic SOIC

DESC SMD number: 5962-91743