CLC5612IM datasheet(14/18 Pages) NSC

14 / 18 page

Application Division (Continued)

Load Termination

The CLC5612 can source and sink near equal amounts of

current. For optimum performance, the load should be tied to

cm.

Driving Cables and Capacitive Loads

When driving cables, double termination is used to prevent

reflections. For capacitive load applications, a small series

resistor at the output of the CLC5612 will improve stability

and settling performance. The Frequency Response vs. C

plot, shown below in

Figure 10, gives the recommended

series resistance value for optimum flatness at various

capacitive loads.

Transmission Line Matching

One method for matching the characteristic impedance (Z

of a transmission line or cable is to place the appropriate

resistor at the input or output of the amplifier.

Figure 11

shows typical inverting and non-inverting circuit configura-

tions for matching transmission lines.

Non-inverting gain applications:

•

Connect pin 2 as indicated in the table in the Closed Loop

Gain Selection section.

•

Make R

1,R2,R6 and R7 equal to Z0.

•

Use R

3 to isolate the amplifier from reactive loading

caused by the transmission line, or by parasitics

Inverting gain applications:

•

Connect R

3 directly to ground.

•

Make the resistors R

4,R6, and R7 equal to Z0.

•

Make R

5\Rg=Z0.

The input and output matching resistors attenuate the signal

by a factor of 2, therefore additional gain is needed. Use C

to match the output transmission line over a greater

frequency range. C

6 compensates for the increase of the

amplifier’s output impedance with frequency.

Power Dissipation

Follow these steps to determine the power consumption of

the CLC5612:

1. Calculate the quiescent (no-load) power: P

amp

CC−VEE)

2. Calculate the RMS power at the output stage: P

0 =(V

CC-Vload)(Iload), where Vload and Iload are the RMS voltage

and current across the external load.

3. Calculate the total RMS power: P

t =Pamp +Po

The maximum power that the DIP and SOIC, packages can

dissipate at a given temperature is illustrated in

Figure 12.

The power derating curve for any CLC5612 package can be

derived by utilizing the following equation:

where T

amb = Ambient temperature (˚C)

JA=Thermal resistance, from junction to ambient, for a

given package (˚C/W)

Ω

CLC5612

0.1

µF

6.8

µF

Vin

VCC

Note: Channel 2 not shown.

6.8

µF

0.1

µF

VEE

DS015001-47

FIGURE 9. Dual Supply, A

V = +2V/V Configuration

Frequency (Hz)

10M

100M

Vo = 1Vpp

CL = 10pF

Rs = 49.9Ω

CL = 100pF

Rs = 17.4Ω

CL = 1000pF

Rs = 6.7Ω

DS015001-48

FIGURE 10. Frequency Response vs. C

Ω

CLC5612

V2 +-

Note: Channel 2 not shown.

DS015001-49

FIGURE 11. Transmission Line Matching

DS015001-51

FIGURE 12. Power Derating Curve

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