SP8538 datasheet(7/12 Pages) SIPEX

7 / 12 page

SP8538DS/01

SP8538 Micropower Sampling 12-Bit A/D Converter

by the differential sampling of the SP8538.

Layout Considerations

To preserve the high resolution and linearity of

the SP8538 attention must be given to circuit

board layout, ground impedance and bypassing.

A circuit board layout which includes separate

analog and digital ground planes will prevent

the coupling of noise into sensitive converter

circuits and will help to preserve the dynamic

performance of the device. In single ended

mode, the analog input signal should be

referenced to the ground pin of the converter.

This prevents any voltage drops that occur in

the power supply's common return from

appearing in series with the input signal.

In full differential mode, the high and low side

board traces should run close to each other, with

the same layout. This will insure that any noise

coupling will be common mode, and cancelled

by the converters (patent pending) full differential

architecture.

If separate analog and digital ground planes are

not possible, care should be used to prevent

coupling between analog and digital signals. If

analog and digital lines must cross, they should

CLK

DIN

DOUT

CLK

DIN

DOUT

POWER UP

SAMPLE

CONVERT

START O/S

S/D LSBFN

HI-Z

“0”

D0 D1

POWER DOWN

D11

HI-Z

LSB FIRST CONVERSION

D11

POWER UP

SAMPLE

CONVERT

START O/S

S/D MSBF

HI-Z

“0”

D1 D0

POWER DOWN

HI-Z

D11

MSB FIRST CONVERSION

do so at right angles. Parallel analog and digital

lines should be separated by a circuit board trace

which is connected to common.

The SP8538 VCC pin is also the reference pin

for the device. This means that noise on the VCC

pin will be proportionally represented as noise

in the converters output data. A noise signal of

1.22mV (at a 5V supply) will produce 1 LSB of

error in the output data. The VCC pin should be

bypassed to the ground pin with a parallel

combination of a 6.8

µF tantalum and a 0.1µF

ceramic capacitor. To maintain maximum

system accuracy, the supply connected to the

VCC pin should be well isolated from digital

supplies and wide load variations. A separate

conductor from the supply regulator to the A/D

converter will limit the effects of digital switching

elsewhere in the system. Power supply noise can

degrade the converters performance. Especially

corrupting are noise and spikes from a switching

power supply.

To avoid introducing distortion when driving the

A/D converter input, the input signal source

should be able to charge the SP8538's

equivalent 20 pF of input capacitance from zero

volts to the signal level in 1.5 clock periods.

SP8538 Timing Diagram

SP8538 Datasheet(PDF) 7 Page - Sipex Corporation

SP8538 Datasheet(HTML) 7 Page - Sipex Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Download

Link URL