TMS320F2812 datasheet(21/103 Pages) TI

21 / 103 page

TMS320F2810, TMS320F2812

DIGITAL SIGNAL PROCESSORS

SPRS174B – APRIL 2001 – REVISED SEPTEMBER 2001

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial port peripherals

The F2810 and F2812 support the following serial communication peripherals:

eCAN:

This is the enhanced version of the CAN peripheral. It supports 32 mailboxes, time stamping

of messages, and is CAN 2.0B-compliant.

McBSP:

This is the multichannel buffered serial port that is used to connect to E1/T1 lines,

phone-quality codecs for modem applications or high-quality stereo-quality Audio DAC

devices. The McBSP receive and transmit registers are supported by a 16-level FIFO. This

significantly reduces the overhead for servicing this peripheral.

SPI:

The SPI is a high-speed, synchronous serial I/O port that allows a serial bit stream of

programmed length (one to sixteen bits) to be shifted into and out of the device at a

programmable bit-transfer rate. Normally, the SPI is used for communications between the

DSP controller and external peripherals or another processor. Typical applications include

external I/O or peripheral expansion through devices such as shift registers, display drivers,

and ADCs. Multi-device communications are supported by the master/slave operation of the

SPI. On the F2810 and the F2812, the port supports a 16-level, receive and transmit FIFO

for reducing servicing overhead.

SCI:

The serial communications interface is a two-wire asynchronous serial port, commonly

known as UART. On the F2810 and the F2812, the port supports a 16-level, receive and

transmit FIFO for reducing servicing overhead.

The F2810 device contains three peripheral register spaces. The spaces are categorized as follows:

D Peripheral Frame 0:

These are peripherals that are mapped directly to the CPU memory bus.

See Table 4.

D Peripheral Frame 1:

These are peripherals that are mapped to the 32-bit peripheral bus.

See Table 5.

D Peripheral Frame 2:

These are peripherals that are mapped to the 16-bit peripheral bus.

See Table 6.

TMS320F2812 Datasheet(PDF) 21 Page - Texas Instruments