ISP1160BD datasheet(42/88 Pages) PHILIPS

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Philips Semiconductors

ISP1160

Embedded USB Host Controller

Product data

Rev. 04 — 04 July 2003

42 of 88

9397 750 11371

10.1.5

HcInterruptEnable register (R/W: 04H/84H)

Each enable bit in the HcInterruptEnable register corresponds to an associated

interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used

to control which events generate a hardware interrupt. A hardware interrupt is

requested on the host bus when three conditions occur:

• A bit is set in the HcInterruptStatus register

• The corresponding bit in the HcInterruptEnable register is set

• Bit MasterInterruptEnable is set.

Writing a logic 1 to a bit in this register sets the corresponding bit, whereas writing a

logic 0 to a bit in this register leaves the corresponding bit unchanged. On a read, the

current value of this register is returned.

Code (Hex): 04 — read

Code (Hex): 84 — write

Table 16:

HcInterruptEnable register: bit allocation

Bit

Symbol

MIE

reserved

Reset

00000000

Access

R/W

Bit

Symbol

reserved

Reset

00000000

Access

R/W

Bit

Symbol

reserved

Reset

00000000

Access

R/W

Bit

Symbol

reserved

RHSC

FNO

reserved

Reset

00000000

Access

R/W

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