PC87413 datasheet(122/257 Pages) NSC

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6.0 ACCESS.bus Interface (Continued)

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122

Revision1.2

Command Byte Type

This type has two variations, according to the value of the INEX bit.

Bit

76543210

Name

INEX=0

RDWR

LOGDEV

Bit

76543210

Name

INEX=1

RDWR

Reserved

XBCSN

XA26-XA24

Bit

Description

INEX (Internal/External Access). Selects the access type for the current transaction.

0: Internal access - to modules within the PC8741x device

1: External access - to devices connected to the X-Bus (PC87417)

RDWR (Read/Write Access). Selects the access direction for the current transaction.

0: Write access - data sent by the master is written into the selected address

1: Read access - data read from the selected address is stored in the Read Buffer

5-0

LOGDEV (Logical Device Number). This ﬁeld indicates the Logical Device Number (LDN) of the accessed

internal functional block. Table 33 deﬁnes the LDN assignment for each functional block of the PC8741x device;

other table values are not allowed. These LDNs are equivalent but not identical to those assigned by the plug-

and-play conﬁguration. Only those Logical Devices that can be accessed both through the ACCESS.bus and the

LPC bus are assigned the same LDN.

Reserved.

4-3

XBCSN (X-Bus Chip-Select Number). These two bits select one of the four X-Bus chip-selects to be accessed

during the current transaction (PC87417).

Bits

4 3

Chip-Select

00:

XCS0

01:

XCS1

10:

XCS2

11:

XCS3

2-0

XA26-XA24 (X-Bus Offset Address). These bits set the value of the X-Bus address lines XA26-XA24, which

are used as offset for the X-Bus access during the current transaction (PC87417). The XA27 address line is set

to ‘0’.

PC87413 Datasheet(PDF) 122 Page - National Semiconductor (TI)

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