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CPC5710N Datasheet(PDF) 8 Page - IXYS Corporation |
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CPC5710N Datasheet(HTML) 8 Page - IXYS Corporation |
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8 / 10 page ![]() INTEGRATED CIRCUITS DIVISION CPC5710N 8 www.ixysic.com R03 3.2 Non-Intrusive Line Monitoring, Display Feature (Caller ID) Signal Reception, and Ringing Detection Application This application uses the logic input LIN/CMP to select between ringing detection or buffering display feature (caller-ID) and voice signals. Note the AC coupling of the tip and ring signals. With this circuit, setting LIN/CMP to a logic high enables the ringing detector. After a valid ringing period, configure LIN/CMP with a logic low to couple the audio frequency signal to the output pins. Please see “Detector Considerations” on page 5 for more information on ringing detection. Figure 5. Non-Intrusive Line Monitoring, Display Feature (Caller ID) Signal Reception, and Ringing Detection Application Circuit 3.2.1 Frequency Response The blocking capacitors used in this application circuit affect the frequency response of the system. With the components shown, response rolls off 3dB @ 166Hz. Other values can be used for different response characteristics. 3.3 Regulatory Issues Component sizing and value recommendations shown in the application circuits above will need to be reviewed with regard to the regulatory and safety requirements for each particular application. RINGING DET Display Feature Output V = V at 500 Hz OUT IN 3.3 or 5 V U1 CPC5710 R1-4 1.8 M Ω C1,2 220 pF R5 1.5M 0603 Ω TIP RING From Control Logic Unless noted otherwise: 1/8W, All resistors are 1%, 1206. VDD 50k Ω Switch shown in Detector Mode IN+ IN- LIN/CMP VDD VDD VDD VSS LINOUT+ LINOUT- + + - - - + 1.625 V 1.25 V 2 V 0 V A=6 V 3 6 7 1 2 5 4 GND 8 GND + - + - R1 C1 R2 R3 R4 C2 CMPOUT |
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