V3021 datasheet(12/15 Pages) EMMICRO

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V3021

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Test Modes

Addr. 0

bit 3

Addr. 0

bit 2

Function

Normal operation

All time keeping accelerated by 32

Parallel increment of all time data

at 1 Hz with no carry over

Parallel increment of all time data

at 32 Hz with no carry over

Table 8

An external signal generator can be used to drive the

divider chain of the V3021. Fig. 11a and 11b show how to

connect the signal generator.

The speed can be

increased by increasing the signal generator frequency to

a maximum of 128 kHz. An external signal generator and

test modes can be combined.

To leave test both test bits (address 0, bits 2 and 3) must

be cleared by software. Test corrupts the current time

and date and so the time and date should be reloaded

after a test session.

Signal Generator Connection

Fig. 11a

Note

: The peak value of the signal provided by the signal

generator should not exceed 2 V on XO.

Fig. 11b

Note

: The peak value of the signal provided by the signal

generator should not exceed 2 V on XO.

Crystal Layout

In order to ensure proper oscillator operation we

recommend the following standard practices:

- Keep traces as short as possible

- Use a guard ring around the crystal

Fig. 12 shows the recommended layout.

Oscillator Layout

Fig. 12

Access Considerations

The section "Communication Cycles" describes the serial

data sequences necessary to complete a communication

cycle. In common with all serial peripherals, the serial

data sequences are not re-entrant, thus a high priority

interrupt, or another software task, should not attempt to

access the V3021 if it is already in the middle of a cycle.

A semaphore (software flag) on access would allow the

V3021 to be shared with other software tasks or interrupt

routines.

There is no time limit on the duration of a

communication cycle and thus interrupt routines (which do

not use the V3021) can be fully executed in mid cycles

without any consequences for the V3021.

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