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DAC7624U Datasheet(PDF) 2 Page - Texas Instruments |
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DAC7624U Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 16 page  2 ® DAC7624/7625 SPECIFICATION At TA = –40°C to +85°C, VDD = +5V, VSS = –5V, VREFH = +2.5V, VREFL = –2.5V, unless otherwise noted. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. DAC7624P, U DAC7624PB, UB DAC7625P, U DAC7625PB, UB NOTES: (1) If VSS = 0V, specification applies at code 00AH and above. (2) LSB means Least Significant Bit, when VREFH equals +2.5V and VREFL equals –2.5V, then one LSB equals 1.22mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error. (5) If VSS = –5V, full-scale 5V step. If VSS = 0V, full-scale positive 2.5V step and negative step from code FFFH to 00AH. PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS ACCURACY Linearity Error(1) VSS = 0V or –5V ±2 ±1 LSB(2) Linearity Matching(3) VSS = 0V or –5V ±2 ±1 LSB Differential Linearity Error VSS = 0V or –5V ±1 ±1 LSB Monotonicity TMIN to TMAX 12 T Bits Zero-Scale Error Code = 000H ±4 T LSB Zero-Scale Drift 25 TT ppm/ °C Zero-Scale Matching(3) ±2 ±1 LSB Full-Scale Error Code = FFFH ±4 T LS Full-Scale Matching(3) ±2 ±1 LSB Zero-Scale Error Code = 00AH, VSS = 0V ±8 T LSB Zero-Scale Drift VSS = 0V 5 10 TT ppm/ °C Zero-Scale Matching(3) VSS = 0V ±4 ±2 LSB Full-Scale Error Code = FFFH, VSS = 0V ±8 T LSB Full-Scale Matching(3) VSS = 0V ±4 ±2 LSB Power Supply Rejection 30 T ppm /V ANALOG OUTPUT Voltage Output(4) VREFL = 0V, VSS = 0V 0 VREFH TT V VSS = –5V VREFL VREFH TT V Output Current –1.25 +1.25 TT mA Load Capacitance No Oscillation 100 T pF Short-Circuit Current +5, –120 T mA Short-Circuit Duration Momentary T REFERENCE INPUT VREFH Input Range VSS = 0V or –5V VREFL +1.25 +2.5 TT V VREFL Input Range VSS = 0V 0 VREFH –1.25 TT V VREFL Input Range VSS = –5V –2.5 VREFH –1.25 TT V DYNAMIC PERFORMANCE Settling Time(5) To ±0.012% 5 10 TT µs Channel-to-Channel Crosstalk Full-Scale Step 0.25 T LSB On any other DAC Output Noise Voltage 0Hz to 1MHz 40 T nV/ √Hz DIGITAL INPUT/OUTPUT Logic Family TTL-Compatible CMOS T Logic Levels VIH IIH ≤ ±10µA 2.4 VDD +0.3 TT V VIL IIL ≤ ±10µA –0.3 0.8 TT V VOH IOH = –0.8mA 3.6 VDD TT V VOL IOL = 1.6mA 0.0 0.4 TT V Data Format Straight Binary T POWER SUPPLY REQUIREMENTS VDD 4.75 5.25 TT V VSS If VSS ≠ 0V –5.25 –4.75 TT V IDD 1.5 1.9 TT mA ISS –2.1 –1.6 TT mA Power Dissipation VSS = –5V 15 20 TT mW VSS = 0V 7.5 10 TT mW TEMPERATURE RANGE Specified Performance DAC7624P, U, PB, UB –40 +85 TT °C DAC7625P, U, PB, UB |
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