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74LVC2G38DP Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC2G38DP Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 15 page  2004 Oct 18 3 Philips Semiconductors Product specification Dual 2-input NAND gate (open drain) 74LVC2G38 FUNCTION TABLE See note 1. Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. ORDERING INFORMATION PINNING INPUT OUTPUT nA nB nY LL Z LH Z HL Z HH L TYPE NUMBER PACKAGE TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING 74LVC2G38DP −40 °C to +125 °C 8 TSSOP8 plastic SOT505-2 Y38 74LVC2G38DC −40 °C to +125 °C 8 VSSOP8 plastic SOT765-1 Y38 74LVC2G38GM −40 °C to +125 °C 8 XSON8 plastic SOT833-1 Y38 PIN SYMBOL DESCRIPTION 1 1A data input 2 1B data input 3 2Y data output 4 GND ground (0 V) 5 2A data input 6 2B data input 7 1Y data output 8VCC supply voltage |
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