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ADCS7477 Datasheet(PDF) 18 Page - National Semiconductor (TI) |
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ADCS7477 Datasheet(HTML) 18 Page - National Semiconductor (TI) |
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18 / 22 page ![]() Applications Information (Continued) the first SCLK edge after CS goes low is a rising edge, all four leading zeroes will be valid on the first four falling edges of SCLK. If instead the first SCLK edge after CS goes low is a falling edge, the first leading zero may not be set up in time for a microprocessor or DSP to read it correctly. The remain- ing data bits are still clocked out on the falling edges of SCLK. 3.0 ADCS7476/77/78 TRANSFER FUNCTION The output format of the ADCS7476/77/78 is straight binary. Code transitions occur midway between successive integer LSB values. The LSB widths for the ADCS7476 is V DD / 4096; for the ADCS7477 the LSB width is V DD / 1024; for the ADCS7478, the LSB width is V DD / 256. The ideal transfer characteristic for the ADCS7476 and ADCS7477 is shown in Figure 6, while the ideal transfer characteristic for the ADCS7478 is shown in Figure 7. 20057711 FIGURE 6. ADCS7476/77 Ideal Transfer Characteristic 20057712 FIGURE 7. ADCS7478 Ideal Transfer Characteristic www.national.com 18 |
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