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ADG3257

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REV. C

High Speed, 3.3 V/5 V Quad 2:1 Mux/Demux

(4-Bit, 1 of 2) Bus Switch

FUNCTIONAL BLOCK DIAGRAM

1A

2A

3A

4A

BE

S

LOGIC

FEATURES

100 ps Propagation Delay through the Switch

2

Switches Connect Inputs to Outputs

Data Rates up to 933 Mbps

Single 3.3 V/5 V Supply Operation

Level Translation Operation

Ultralow Quiescent Supply Current (1 nA Typical)

3.5 ns Switching

Standard ‘3257 Type Pinout

APPLICATIONS

Bus Switching

Bus Isolation

Level Translation

Memory Switching/Interleaving

PRODUCT HIGHLIGHTS

1. 0.1 ns propagation delay through switch

2. 2

Ω switches connect inputs to outputs

3. Bidirectional operation

4. Ultralow power dissipation

5. 16-lead QSOP package

Table I. Truth Table

BE

S

Function

HX

DISABLE

LL

LH

GENERAL DESCRIPTION

The ADG3257 is a CMOS bus switch comprised of four 2:1

multiplexers/demultiplexers with high impedance outputs. The

device is manufactured on a CMOS process. This provides low

power dissipation yet high switching speed and very low ON

resistance, allowing the inputs to be connected to the outputs

without adding propagation delay or generating additional ground

bounce noise.

The ADG3257 operates from a single 3.3 V/5 V supply. The

control logic for each switch is shown in Table I. These switches

are bidirectional when ON. In the OFF condition, signal levels are

blocked up to the supplies.

This bus switch is suited to both switching and level translation

applications. It may be used in applications requiring level

translation from 3.3 V to 2.5 V when powered from 3.3 V.

the ADG3257 may also be used in applications requiring 5 V

to 3.3 V level translation.