7

6

5

4

3

2

1

15

16

17

18

19

20

21

28

27

26

25

24

23

22

8

9

10

11

12

13

14

N/C

IN0+

IN0-

IN1+

IN1-

N/C

OUT0+

OUT0-

OUT1+

OUT1-

DAP

(GND)

DS90CP02

SNLS267A – NOVEMBER 2008 – REVISED MARCH 2013

www.ti.com

Table 1. PIN DESCRIPTIONS

Pin

Pin

I/O, Type

Description

Name

Number

DIFFERENTIAL INPUTS COMMON TO ALL MUXES

IN0+

9

I, LVDS

Inverting and non-inverting differential inputs. LVDS, Bus LVDS, CML, or LVPECL

IN0

−

10

compatible.

IN1+

12

I, LVDS

Inverting and non-inverting differential inputs. LVDS, Bus LVDS, CML, or LVPECL

IN1

−

13

compatible.

SWITCHED DIFFERENTIAL OUTPUTS

OUT0+

27

O, LVDS

Inverting and non-inverting differential outputs. OUT0± can be connected to any one pair

OUT0

−

26

IN0±, or IN1±. LVDS compatible .

OUT1+

24

O, LVDS

Inverting and non-inverting differential outputs. OUT1± can be connected to any one pair

OUT1

−

23

IN0±, or IN1±. LVDS compatible .

DIGITAL CONTROL INTERFACE

SEL0, SEL1

6

I, LVTTL

Select Control Inputs

5

EN0, EN1

7

I, LVTTL

Output Enable Inputs

15

N/C

8, 20, 28

Not Connected

POWER

11, 14, 16,

I, Power

18, 19, 22,

25

GND

DAP, 1, 2,

I, Power

Ground reference to LVDS and CMOS circuitry.

3, 4, 17,

For the UQFN package, the DAP is used as the primary GND connection to the device.

21

The DAP is the exposed metal contact at the bottom of the UQFN-28 package. It should be

connected to the ground plane with at least 4 vias for optimal AC and thermal performance.

Connection Diagram

Figure 2. UQFN Top View

DAP = GND

See Package Number NJD0028A

2

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