ADS5500IPAP datasheet(26/29 Pages) TI

26 / 29 page

ADS5500

SBAS303C − DECEMBER 2003 − REVISED MARCH 2004

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OUTPUT INFORMATION

The ADC provides 14 data outputs (D13 to D0, with D13

being the MSB and D0 the LSB), a data-ready signal

(CLKOUT, pin 43), and an out-of-range indicator (OVR,

pin 64) that equals 1 when the output reaches the

full-scale limits.

Two different output formats (straight offset binary or

two’s complement) and two different output clock

polarities (latching output data on rising or falling edge

of the output clock) can be selected by setting DFS

(pin 40) to one of four different voltages. Table 3 details

the four modes. In addition, output enable control (OE,

pin 41, active high) is provided to tri-state the outputs.

The output circuitry of the ADS5500 has being designed

to minimize the noise produced by the transients of the

data switching, and in particular its coupling to the ADC

analog circuitry. Output D4 (pin 51) senses the load

capacitance and adjusts the drive capability of all the

output pins of the ADC to maintain the same output slew

rate described in the timing diagram of Figure 1, as long

as all outputs (including CLKOUT) have a similar load

as the one at D4 (pin 51). This circuit also reduces the

sensitivity of the output timing versus supply voltage or

temperature. External series resistors with the output

are not necessary.

SERIAL PROGRAMMING INTERFACE

The

ADS5500

has

internal

registers

for

the

programming of some of the modes described in the

previous sections. The registers should be reset after

power-up by applying a 2

µs (minimum) high pulse on

RESET (pin 35); this also resets the entire ADC and

sets the data outputs to low. This pin has a 200k

Ω

internal pull-up resistor to AVDD. The programming is

done through a three-wire interface. The timing diagram

and serial register setting in the Serial Programing

Interface section describe the programming of this

Table 2 shows the different modes and the bit values to

be written on the register to enable them.

Note that some of these modes may modify the

standard operation of the device and possibly vary the

performance with respect to the typical data shown in

this data sheet.

ADS5500IPAP Datasheet(PDF) 26 Page - Texas Instruments

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