DS99R103 datasheet(21/29 Pages) TI1

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ROUT0

ROUT1

ROUT2

ROUT3

ROUT4

ROUT5

ROUT6

ROUT7

ROUT8

ROUT9

ROUT10

ROUT11

ROUT12

ROUT13

ROUT14

ROUT15

ROUT16

ROUT17

ROUT18

ROUT19

ROUT20

ROUT21

ROUT22

ROUT23

RCLK

RPWDNB

REN

RRFB

RESRVD

RIN+

RIN-

VDDOR2

VDDOR3

VDDR1

VDDR0

VDDPR1

VDDPR0

Notes:

RPWDNB = System GPO

REN = High (ON)

RRFB = High (Rising edge)

RESRVD = Low

3.3V

DS99R104 (DES)

C10

VDDIR

VDDOR1

VSSPR0

VSSPR1

VSSR0

VSSR1

VSSIR

VSSOR1

VSSOR2

VSSOR3

LOCK

C1 to C4 = 0.01 P F

C5 to C8 = 0.1 P F

C9, C10 = 100 nF; 50WVDC, NPO or X7R

Serial

LVDS

Interface

LVCMOS

Parallel

Interface

GPO if used, or tie High (ON)

3.3V

DS99R103, DS99R104

www.ti.com

SNLS241D – MARCH 2007 – REVISED APRIL 2013

Figure 21. DS99R104 Typical Application Connection

TRUTH TABLES

DS99R103 Serializer Truth Table

TPWDNB

DEN

Tx PLL Status

LVDS Outputs

(Pin 9)

(Pin 18)

(Internal)

(Pins 19 and 20)

Hi Z

Not Locked

Hi Z

Locked

Serialized Data with Embedded Clock

DS99R104 Deserializer Truth Table

ROUTn and RCLK

RPWDNB

REN

Rx PLL Status

LOCK

(See DS99R104 Pin

(Pin 1)

(Pin 48)

(Internal)

(Pin 17)

Diagram)

Hi Z

L = PLL Unocked;

H = PLL Locked

Not Locked

Hi Z

Locked

Data and RCLK Active

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