WM8758 datasheet(73/90 Pages) WOLFSON

73 / 90 page

Production Data

WM8758B

PD, Rev 4.4, January 2012

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

GPIO control

5:4

JD_SEL

Pin selected as jack detection input

00 = GPIO1

01 = GPIO2

10 = GPIO3

11 = Reserved

JD_EN

Jack Detection Enable

0 = disabled

1 = enabled

8:7

JD_VMID

[7] VMID_EN_0

[8] VMID_EN_1

R13

3:0

JD_EN0

0000

Output enables when selected jack

detection input is logic 0.

0000 = OUT1_EN_0

0001 = OUT2_EN_0

0010 = OUT3_EN_0

0011 = OUT4_EN_0

0100-1111 = Reserved

7:4

JD_EN1

0000

Output enables when selected jack

detection input is logic 1

0000-0011 = Reserved

0100 = OUT1_EN_1

0101 = OUT2_EN_1

0110 = OUT3_EN_1

0111 = OUT4_EN_1

1000-1111 = Reserved

Table 51 Jack Detect Register Control Bits

CONTROL INTERFACE

SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS

The control interface can operate as either a 3-wire or 2-wire control interface. The MODE pin

determines the 2 or 3 wire mode as shown in Table 52.

The WM8758B is controlled by writing to registers through a serial control interface. A control word

consists of 16 bits. The first 7 bits (B15 to B9) are register address bits that select which control

each control register.

MODE

INTERFACE FORMAT

Low

2 wire

High

3 wire

Table 52 Control Interface Mode Selection

3-WIRE SERIAL CONTROL MODE

In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on

CSB/GPIO latches in a complete control word consisting of the last 16 bits.

WM8758 Datasheet(PDF) 73 Page - Wolfson Microelectronics plc

WM8758 Datasheet(HTML) 73 Page - Wolfson Microelectronics plc

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