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WM8958 Datasheet(PDF) 80 Page - Wolfson Microelectronics plc |
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WM8958 Datasheet(HTML) 80 Page - Wolfson Microelectronics plc |
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80 / 377 page ![]() WM8958 Pre-Production w PP, August 2012, Rev 3.4 80 DRC REGISTER CONTROLS The AIF1DRC1 control registers are described in Table 30. The AIF1DRC2 control registers are described in Table 31. The AIF2DRC control registers are described in Table 32. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1088 (0440h) AIF1 DRC1 (1) 8 AIF1DRC1_NG_ ENA 0 AIF1 DRC1 Noise Gate Enable 0 = Disabled 1 = Enabled 5 AIF1DRC1_KNE E2_OP_ENA 0 AIF1 DRC1 KNEE2_OP Enable 0 = Disabled 1 = Enabled 4 AIF1DRC1_QR 1 AIF1 DRC1 Quick-release Enable 0 = Disabled 1 = Enabled 3 AIF1DRC1_ANTI CLIP 1 AIF1 DRC1 Anti-clip Enable 0 = Disabled 1 = Enabled R1089 (0441h) AIF1 DRC1 (2) 12:9 AIF1DRC1_ATK [3:0] 0100 AIF1 DRC1 Gain attack rate (seconds/6dB) 0000 = Reserved 0001 = 181us 0010 = 363us 0011 = 726us 0100 = 1.45ms 0101 = 2.9ms 0110 = 5.8ms 0111 = 11.6ms 1000 = 23.2ms 1001 = 46.4ms 1010 = 92.8ms 1011 = 185.6ms 1100-1111 = Reserved 8:5 AIF1DRC1_DCY [3:0] 0010 AIF1 DRC1 Gain decay rate (seconds/6dB) 0000 = 186ms 0001 = 372ms 0010 = 743ms 0011 = 1.49s 0100 = 2.97s 0101 = 5.94s 0110 = 11.89s 0111 = 23.78s 1000 = 47.56s 1001-1111 = Reserved 4:2 AIF1DRC1_MIN GAIN [2:0] 001 AIF1 DRC1 Minimum gain to attenuate audio signals 000 = 0dB 001 = -12dB (default) 010 = -18dB 011 = -24dB 100 = -36dB 101 = Reserved 11X = Reserved |
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