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LM4853 Datasheet(PDF) 13 Page - Texas Instruments

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Part # LM4853
Description  Mono 1.5 W / Stereo 300mW Power Amplifier
PDF  25 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM4853 Datasheet(HTML) 13 Page - Texas Instruments

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LM4853
www.ti.com
SNAS155E – JANUARY 2002 – REVISED MAY 2013
A bridge configuration, such as the one used in LM4853, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, BTL OUT- and BTL OUT+, are biased at half-supply, no net DC voltage
exists across the load. This eliminates the need for the output coupling capacitor that a single supply, single-
ended amplifier configuration requires. Eliminating an output coupling capacitor in a single-ended configuration
forces the half-supply bias voltage across the load. This increases internal IC power dissipation and may cause
permanent loudspeaker damage.
POWER DISSIPATION
Whether the power amplifier is bridged or single-ended, power dissipation is a major concern when designing the
amplifier. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a
given supply voltage and driving a specified load.
PDMAX = (VDD)
2/(2π2 R
L): Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase
in internal power dissipation.Equation 3 states the maximum power dissipation point for a bridge amplifier
operating at the same given conditions.
PDMAX = 4 × (VDD)
2/(2π2 R
L): Bridge Mode
(3)
The LM4853 is designed to drive either two single-ended loads simultaneously or one mono bridged-tied load. In
SE mode, the maximum internal power dissipation is 2 times that of Equation 2. In BTL mode, the maximum
internal power dissipation is the result of Equation 3. Even with this substantial increase in power dissipation, the
LM4853 does not require heatsinking. The power dissipation from Equation 3 must not be greater than the power
dissipation predicted by Equation 4:
PDMAX = (TJMAX - TA)/ θJA
(4)
For the package DGS,
θJA = 194°C/W. TJMAX = 150°C for the LM4853. Depending on the ambient temperature,
TA, of the surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the
IC packaging. If the result of Equation 3 is greater than that of Equation 4, then either the supply voltage must be
decreased, the load impedance increased, or the ambient temperature reduced. For the typical application of a
5V power supply, and an 8
Ω bridged load, the maximum ambient temperature possible without violating the
maximum junction temperature is approximately 27°C for package DGS. This assumes the device operates at
maximum power dissipation and uses surface mount packaging. Internal power dissipation is a function of output
power. If typical operation is not around the maximum power dissipation point, operation at higher ambient
temperatures is possible. Refer to the Typical Performance Characteristics curves for power dissipation
information for different output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. The value of the pin bypass capacitor, CB, directly affects the LM4853's half-supply voltage stability and
PSRR. The stability and supply rejection increase as the bypass capacitor's value increases Typical applications
employ a 5V regulator with a 10µF and a 0.1µF bypass capacitors which aid in supply filtering. This does not
eliminate the need for bypassing the supply nodes of the LM4853. The selection of bypass capacitors, especially
CB, is thus dependent upon desired PSRR requirements, click and pop performance, system cost, and size
constraints.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4853 features amplifier bias circuitry shutdown.
This shutdown function is activated by applying a logic high to the SHUTDOWN pin. The trigger point is 2.0V
minimum for a logic high level, and 0.8V maximum for a logic low level. It is best to switch between ground and
the supply, VDD, to ensure correct shutdown operation. By switching the SHUTDOWN pin to VDD, the LM4853
supply current draw will be minimized in idle mode. Whereas the device will be disabled with shutdown voltages
less than VDD, the idle current may be greater than the typical value of 18µA. In either case, the SHUTDOWN pin
should be tied to a fixed voltage to avoid unwanted state changes.
Copyright © 2002–2013, Texas Instruments Incorporated
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