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DAN-201 Datasheet(PDF) 2 Page - Exar Corporation

Part # DAN-201
Description  INDEPENDENT TX AND RX BAUD RATE GENERATOR
PDF  4 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

DAN-201 Datasheet(HTML) 2 Page - Exar Corporation

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DATA COMMUNICATIONS APPLICATION NOTE
2
DAN 201
2.2 BAUD RATE GENERATOR FOR M SINGLE CHANNEL UARTS
The XR16Mxxx single channel UART family has the independent baud rate generator feature. Thus, the trans-
mitter and receiver can run at different baud rates (see Figure 2). DLL, DLM and DLD needs to be initialized
for both TX and RX.
FIGURE 2. BAUD RATE GENERATOR FOR M SINGLE CHANNEL FAMILY UARTS
XTAL1
XTAL2
/
-
(default)
16X or 8X or 4X
Sampling Rate Clock
to Transmitter
Prescaler
Divide by 1
Prescaler
Divide by 4
MCR Bit 7= 0
MCR Bit -7=1
Crystal
Osc
Buffer
DLL
DLM
DLD[5:0]
DLL
DLM
DLD[5:0]
16X or 8X or 4X
Sampling Rate Clock
to Receiver
DLD[7]=0
DLD[7]=1
0
1
DLD[6]
By default, the TX and RX uses the same BRG. Different BRGs can be enabled by DLD[6]. While initializing,
DLD[7] selects the BRG that is being configured.
3.0 PROGRAMMING FOR INDEPENDENT TX AND RX BAUD RATE GENERATOR
By setting DLD, XR16Mxxx single channel UART family can operate transmitter (TX) and receiver (RX) in
different baud rate. The following examples show different set-ups. The first 2 examples use the same baud
rate generator (BRG) for both TX and RX. Others use different BRGs for TX and RX.
3.1 TX AND RX BAUD RATES ARE 921.6 KBPS WITH 14.7456 MHZ FREQUENCY
This example uses the default 16X sampling rate and the default BRG prescaler value 1 for both TX and RX.
write(LCR, 0xBF);
write(EFR, 0x10);
//EFR[4] = 1 to enable the access of DLD
write(LCR,0x80);
write(DLD, 0x0);
//TX and RX use same BRG
write(DLL, 0x1);
write(DLM, 0x0);
write(LCR, 0x3);
//Set data format 8 data bit and 1 stop bit
3.2 TX AND RX BAUD RATES ARE 921.6 KBPS WITH 24 MHZ FREQUENCY
This example uses the 8X sampling rate and the default BRG prescaler value 1 for both TX and RX.
write(LCR, 0xBF);
write(EFR, 0x10);
//EFR[4] = 1 to enable the access of DLD
write(LCR, 0x80);
write(DLD, 0x14);
//TX and RX use same BRG; Enable 8X mode;Set the fractional baud rate
write(DLL, 0x3);
write(DLM, 0x0);
write(LCR, 0x3);
//Set data format 8 data bit and 1 stop bit



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