SP7651ER datasheet(9/15 Pages) EXAR

9 / 15 page

Rev J: 3/4/07

SP765 Wide Input Voltage Range 3A, 900kHz, Buck Regulator

APPLICATIONS INFORMATION

whentantalumcapacitorsareused.Tantalum

capacitors are known for catastrophic failure

when exposed to surge current, and input

capacitors are prone to such surge current

when power supplies are connected “live”

to low impedance power sources.

Loop Compensation Design

The open loop gain of the whole system

can be divided into the gain of the error

amplifier, PWM modulator, buck converter

output stage, and feedback resistor divider.

In order to cross over at the selected fre-

quency FCO, the gain of the error amplifier

compensates for the attenuation caused by

the rest of the loop at this frequency. The

goal of loop compensation is to manipulate

loop frequency response such that its gain

crosses over 0db at a slope of -20db/dec.

The first step of compensation design is to

pick the loop crossover frequency.

High crossover frequency is desirable for

fasttransientresponse,butoftenjeopardizes

the higher than the ESR zero but less than

/5 of the switching frequency. The ESR

zero is contributed by the ESR associated

with the output capacitors and can be de-

termined by:

SP765 Voltage Mode Control Loop with Loop Dynamic

(SRz2Cz2+1)(SR1Cz3+1)

(SR ESR COUT + 1)

[S^2LC

OUT +S(R ESR +R DC) C OUT +1]

VIN

SR1Cz2(SRz3Cz3+1)(SRz2Cp1+1)

VRAMP_PP

VOUT

(Volts)

VREF

(Volts)

Notes: R

ESR = Output Capacitor Equivalent Series Resistance.

DC = Output Inductor DC Resistance.

RAMP_PP = SP6132 Internal RA

MP Amplitude Peak to Peak V oltage.

Condition: Cz2 >> Cp1 & R1 >> Rz3

Output Load Resistance >> R

ESR & R DC

R 2

VREF

(R 1 + R2)

VOUT

VFBK

(Volts)

Type III V oltage Loop

Compensation

AMP (s) Gain Block

PWM Stage

PWM Gain

Block

Output Stage

OUT (s) Gain

Block

Voltage Feedback

FBK Gain Block

Definitions:

RESR = Output Capacitor Equivalent Series Resistance

RDC = Output Inductor DC Resistance

RRAMP_PP = SP765 internal RAMP Amplitude Peak-to-Peak Voltage

systemstability.Crossoverfrequencyshould

be higher than the ESR zero but less than

/5 of the switching frequency. The ESR

zero is contributed by the ESR associated

with the output capacitors and can be de-

termined by:

ƒz(ESR) =

2π COUT RESR

The next step is to calculate the complex

conjugate poles contributed by the LC

output filter,

ƒP(LC) =

2π

√ L COUT

When the output capacitors are Ceramic

type, the SP765 Evaluation Board requires

aTypeIIIcompensationcircuittogiveaphase

boostof180°inordertocounteracttheeffects

of an underdamped resonance of the output

filter at the double pole frequency.

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