Unused Input

Input

Output

Output

Input

Unused Input

Vcc

0

10

20

50

60

70

80

2

4

5

6

Ta =25

Q/Q

13

SN54HC273, SN74HC273

www.ti.com

SCLS136E – DECEMBER 1982 – REVISED JULY 2016

Product Folder Links: SN54HC273 SN74HC273

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Copyright © 1982–2016, Texas Instruments Incorporated

Typical Application (continued)

9.2.3 Application Curve

10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in

Recommended Operating Conditions.

capacitor for each power pin. It is ok to parallel multiple bypass capacitors to reject different frequencies of noise.

0.1-µF and 1-µF capacitors are commonly used in parallel. The bypass capacitor must be installed as close to

the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of

digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3

of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at

the outside connections result in undefined operational states. Specified below are the rules that must be

observed under all circumstances:

•

All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from

floating.

•

The logic level that must be applied to any particular unused input depends on the function of the device.

•

11.2 Layout Example

Figure 4. SNx4HC273 Layout