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J113 Datasheet(PDF) 2 Page - Linear Integrated Systems

Part # J113
Description  SINGLE N-CHANNEL JFET
PDF  2 Pages
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Manufacturer  LINEAR [Linear Integrated Systems]
Direct Link  http://www.linearsystems.com
Logo LINEAR - Linear Integrated Systems

J113 Datasheet(HTML) 2 Page - Linear Integrated Systems

  J113 Datasheet HTML 1Page - Linear Integrated Systems J113 Datasheet HTML 2Page - Linear Integrated Systems  
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DYNAMIC ELECTRICAL CHARACTERISTICS @25 °C (unless otherwise stated)
J/SST111
J/SST112
J/SST113
SYM.
CHARACTERISTIC
TYP
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
CONDITIONS
gfs
Forward Transconductance
6
mS
gos
Output Conductance
25
µS
VDS = 20V, ID = 1mA
f = 1kHz
rds(on)
Drain to Source On Resistance
30
50
100
VGS = 0V, ID = 0mA
f = 1kHz
Ciss
Input Capacitance
7
12
12
12
Crss
Reverse Transfer Capacitance
3
5
5
5
pF
VDS = 0V, VGS = -10V
f = 1MHz
en
Equivalent Noise Voltage
3
nV/√Hz
VDG = 10V, ID = 1mA
f = 1 kHz
Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
SWITCHING CIRCUIT CHARACTERISTICS
SYM.
J/SST111
J/SST112
J/SST113
VGS(L)
-12V
-7V
-5V
RL
800Ω
1600Ω
3200Ω
ID(on)
12mA
6mA
3mA
SWITCHING CHARACTERISTICS
SYM.
CHARACTERISTIC
TYP UNIT
CONDITIONS
td(on)
2
tr
Turn On Time
2
td(off)
6
tf
Turn Off Time
15
ns
VDD = 10V
VGS(H) = 0V
51
R
L
1k
51
V
DD
V
GS(H)
V
GS(L)
OUT
123
LS XXX
YYWW
0.170
0.195
0.500
0.610
0.016
0.022
0.095
0.105
0.045
0.055
0.175
0.195
0.130
0.155
0.045
0.060
0.014
0.020
TO-92
DIMENSIONS
IN INCHES.
1
2
3
SOT-23
DIMENSIONS IN
MILLIMETERS
0.89
1.03
1.78
2.05
1.20
1.40
2.10
2.64
0.37
0.51
2.80
3.04
0.89
1.12
0.013
0.100
0.085
0.180
0.55
SWITCHING TEST CIRCUIT
NOTES
1.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
2.
Pulse test: PW ≤ 300µs, Duty Cycle ≤ 3%
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implicatio
otherwise under any patent or patent rights of Linear Integrated Systems.
n or



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