Application Notes

PRODUCT DESCRIPTION

The LMS4684 is a low voltage dual analog switch with

extremely low On-Resistance operating with a supply volt-

age range of 1.8V to 5.5V. National has fully characterized

the LMS4684 to operate in applications with 3V nominal

supply voltage. The LMS4684 also features fast switching

times for Turn-Off (40ns max over temp) and Turn-On (65ns

max over temp).

The switch operates asymmetrically, one terminal is normally

closed (NC) and the other terminal normally open (NO).

Both NC and NO terminals are connected to a common

terminal (COM). This configuration is ideal for applications

with asymmetric loads such as speaker handsets and inter-

nal speakers.

ANALOG SIGNAL LEVELS

The Analog signal ranges from GND to V

through the switch with very little change. Each switch is

bidirectional so any pin can be an input or output.

DIGITAL CONTROL INPUTS

The IN pin can be driven to 5.5V regardless of the voltage

level of the supply pin V

a supply of 2V you could still drive the IN digital control input

to 5V. Minimum power is lost when the IN pin, is driven

rail-to-rail.

SUPPLY VOLTAGE SEQUENCING

It is good general practice to first apply the supply voltage to

a CMOS device before any other supply on other pins.This is

also true for the LMS4684 analog switch which is a CMOS

device.

However if it is necessary to have an analog signal applied

before the supply voltage is applied and the analog signal

supply is not limited to 20mA max, a diode connected be-

tween the supply voltage and the V

figure below will supply adequate input protection. This will

limit the max analog voltage to a diode drop below V

diode D1 will also provide protection against some overvolt-

age situations.

PCB LAYOUT

Both the LLP and micro SMD packages offer enhanced

board real estate savings because of their tiny footprints.

These tiny packages are capable of supporting up to an

absolute maximum of 400mA of continuous current because

of the advanced thermal handling capabilities.

The LLP package has the exposed die attach pad internally

connected to the internal circuit GND. When this pad is

soldered to copper on the PCB board according to Applica-

tion Note AN-1187 the full thermal capability of the LLP

package can be achieved without additional bulky heat sinks

to dissipate the heat generated. The micro SMD package

has a similar capability to help dissipate heat generated

through Bumps B2 and C2 which are not electrically con-

nected. To enhance heat dissipation of the micro SMD pack-

age B2 and C2 could be connected to the GND pin and

through copper traces on the board.

Please see Application Note AN-1112 for micro SMD pack-

age considerations.

20077519

FIGURE 1. Overvoltage Protection Circuitry

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