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THS789 Datasheet(PDF) 11 Page - Texas Instruments |
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THS789 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 34 page ![]() THS789 www.ti.com SLOS776A – SEPTEMBER 2012 – REVISED DECEMBER 2015 Table 4. Central Control and Status Registers Description Register Bit Name Function Logic State Description 0 Disabled 0 TEST_En Enables or disables factory test routines. 1 Enabled 0 1 RESET Reset the device. Device is fully operational after 250 μs. 1 Reset 2 Reserved Reserved 0 3 Reserved Reserved 0 4 Reserved Reserved 0 5 Reserved Reserved 0 6 Reserved Reserved 0 7 Reserved Reserved 1 8 Reserved Reserved 0 9 Reserved Reserved 1 80h 0 Disabled 10 OT_En Enables or disables the over temperature alarm circuits. 1 Enabled 0 11 RST_OT_ALM Resets the temperature alarm. 1 Reset alarm state 0 Positive edge Defines the polarity of the Sync input for the upcoming 12 SYNC_TS_Pol timestamp generation. 1 Negative edge 0 Sync disabled 13 SYNC_IP_ENI Enables or disables the sync channel 1 Sync enabled 0 Powered up 14 PWR_DN Powers down the device 1 Powered down 0 Disabled 15 RCLK_En Enables RCLK 1 Enabled 1 Reserved Reserved 1 N/A 2 Reserved Reserved 1 N/A 81h 0 Normal mode It disables the RCLK and digital clks internal during 3 Quiet_Mod timestamp process. Allows for only 16 timestamps. 1 Quiet mode 0 Device is not ready Indicates that the internal clks, coarse counter and Sync 0 TMU_Ready channel are operational. 1 Device is ready 0 No alarm Over temperature alarm. Indicates that the junction 1 OT_ALM temperature is 140°C. 1 Alarm is enabled 82h 0 DLL is locked 2 DLL_Lock_Sync Indicates the Sync channel DLL lock status. 1 DLL is not locked 0 DLL is locked 3 DLL_Lock_1G2 Indicates the lock status of the 1.2-GHz internal clock. 1 DLL is not locked Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: THS789 |
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