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DSC2010 Datasheet(PDF) 2 Page - Micrel Semiconductor |
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DSC2010 Datasheet(HTML) 2 Page - Micrel Semiconductor |
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2 / 6 page ![]() ______________________________________________________________________________________________________________________________________________ DSC2010 Page 2 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Pin Description Pin No. Pin Name Pin Type Description 1 Enable I Enables outputs when high and disables when low 2 NC NA Leave unconnected or grounded 3 NC NA Leave unconnected or grounded 4 GND Power Ground 5 FS0 I Least significant bit for frequency selection 6 FS1 I Most significant bit for frequency selection 7 NC NA Leave unconnected or grounded 8 Output O CMOS output 9 OS0 I Least significant bit for output drive strength selection 10 OS1 I Middle bit for output drive strength selection 11 NC NA Leave unconnected or grounded 12 VDD2 Power Power Supply 13 VDD Power Power Supply 14 OS2 I Most significant bit for output drive strength selection Operational Description The DSC2010 is a CMOS oscillator consisting of a MEMS resonator and a support PLL IC. The CMOS output is generated through independent 8-bit programmable dividers from the output of the internal PLL. The actual frequency output by the DSC2010 is controlled by an internal pre-programmed memory (OTP). This memory stores all coefficients required by the PLL for up to four different frequencies. Two control pins (FS0 – FS1) select the output frequency. Discera supports customer defined versions of the DSC2010. Standard frequency options are described in the following sections. When Enable (pin 1) is floated or connected to VDD, the DSC2010 is in operational mode. Driving Enable to ground will disable the output driver ( hi-impedance mode). The DSC2010 has programmable output drive strength. Using three control pins (OS0-OS2) the drive strength can be adjusted to match circuit board impedances to reduce power supply noise, overshoot/undershoot and EMI. Table 1 displays typical rise / fall times for the output with a 15pf load capacitance as a function of these control pins at VDD=3.3V and room temperature. Table 1. Rise/Fall times for drive strengths Output Drive Strength Bits [OS2, OS1, OS0] - Default [111] 000 001 010 011 100 101 110 111 tr (ns) 2.1 1.7 1.6 1.4 1.3 1.3 1.2 1.1 tf (ns) 2.5 2.4 2.4 2.2 1.8 1.6 1.4 1.4 |
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