CD54HC20 datasheet(1/9 Pages) TI

Part #	CD54HC20

Description	High-Speed CMOS Logic Dual 4-Input NAND Gate

PDF	9 Pages

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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1

Data sheet acquired from Harris Semiconductor

SCHS130C

Features

• Buffered Inputs

• Typical Propagation Delay: 8ns at VCC = 5V,

CL = 15pF, TA = 25

oC

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

Description

The ’HC20 and ’HCT20 logic gates utilize silicon gate CMOS

technology to achieve operating speeds similar to LSTTL

gates with the low power consumption of standard CMOS

integrated circuits. All devices have the ability to drive 10

LSTTL loads. The HCT logic family is functionally pin

compatible with the standard LS logic family.

Pinout

CD54HC20, CD54HCT20

(CERDIP)

CD74HC20, CD74HCT20

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

(oC)

PACKAGE

CD54HC20F3A

-55 to 125

14 Ld CERDIP

CD54HCT20F3A

-55 to 125

14 Ld CERDIP

CD74HC20E

-55 to 125

14 Ld PDIP

CD74HC20M

-55 to 125

14 Ld SOIC

CD74HC20MT

-55 to 125

14 Ld SOIC

CD74HC20M96

-55 to 125

14 Ld SOIC

CD74HCT20E

-55 to 125

14 Ld PDIP

CD74HCT20M

-55 to 125

14 Ld SOIC

CD74HCT20MT

-55 to 125

14 Ld SOIC

CD74HCT20M96

-55 to 125

14 Ld SOIC

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel

of 250.

1A

1B

NC

1C

1D

1Y

GND

VCC

2D

2C

NC

2B

2A

2Y

1

2

3

4

5

6

7

14

13

12

11

10

9

8

August 1997 - Revised September 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright

CD54HC20, CD74HC20,

CD54HCT20, CD74HCT20

High-Speed CMOS Logic

Dual 4-Input NAND Gate

[ /Title

(CD74H

C20,

CD74H

CT20)

/Subject

(High

Speed

CMOS

Logic

Dual 4-

Input

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