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LP8501 Datasheet(PDF) 26 Page - Texas Instruments |
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LP8501 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 51 page ![]() LED brightness (adjusted with PWM duty cycle) Time Powersave mode if brightness = 0 longer than 50 ms POWER SAVE POWERSAVE Time Additional power savings from PWM powersave mode Chip current consumption (LED current not included) LED brightness (adjusted with PWM duty cycle) Time Time Powersave mode if brightness = 0 longer than 50 ms Chip current consumption (LED current not included) POWER SAVE POWERSAVE LP8501 SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013 www.ti.com PWM Cycle Power Save Mode PWM cycle power save mode is enabled when the PWM_POWERSAVE bit in register 36h is set to '1'. In PWM power save mode analog blocks are powered down during the down time of the PWM cycle. Blocks are powered down depending upon whether an external or an internal clock is used. While the Automatic Power-Save Mode saves energy when there is no PWM activity, the PWM Power-Save mode saves energy during PWM cycles. Like the Automatic Power-Save Mode, PWM Power-Save Mode works also during program execution. Figure 22. The Effect of Power-Save mode during a Lighting Sequence Figure 23. The effect of Powersave and PWM Powersave modes during a lighting sequence Logic Interface Operational Description The LP8501 features a flexible logic interface for connecting to processor and peripheral devices. Communication is done with and I2C-compatible interface; different logic input/output pins makes it possible to, for example, trigger program execution or enable power saving for the device. 26 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LP8501 |
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