MT352SLASHCG datasheet(3/24 Pages) ZARLINK

3 / 24 page

MT352

Data Sheet

Zarlink Semiconductor Inc.

Pin Description

Pin Description Table

Pin No

Name

Description

I/O

Type

MPEG pins

MOSTRT

MPEG packet start

CMOS Tristate

3·3

MOVAL

MPEG data valid

3·3

49-53, 56-58

MDO(0:7)

MPEG data bus

3·3

MOCLK

MPEG clock out

3·3

BKERR

Block error

3·3

MICLK

MPEG clock in

CMOS

3·3

STATUS

Status output

3·3

6IRQ

Interrupt output

Open drain

Control pins

CLK1

Serial clock

CMOS

DATA1

Serial data

I/O

Open drain

XTI

Low phase noise

oscillator

CMOS

XTO

SLEEP

Device power down

3·3

12, 15-18

SADD(4:0)

Serial address set

3·3

SMTEST

Scan mode enable

3·3

CLK2/GPP0

Serial clock tuner

I/O

Open drain

DATA2/GPP1

Serial data tuner

I/O

AGC1

Primary AGC

AGC2/GPP2

Secondary AGC

I/O

GPP(3)

General purpose I/O

I/O

RESET

Device reset

CMOS

OSCMODE

Crystal oscillator mode

CMOS

3·3

PLLTEST

PLL analogue test

Analog inputs

VIN

positive input

VIN

negative input

Supply pins

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