DS75161AWM datasheet(4/10 Pages) NSC

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Switching Load Configurations

Connection Diagrams

Functional Description

DS75160A

This device is an 8-channel bi-directional transceiver with

one common direction control input, denoted TE. When used

to implement the IEEE-488 bus, this device is connected to

the eight data bus lines, designated DIO

1– DIO8. The port

connections to the bus lines have internal terminators, in ac-

cordance with the IEEE-488 Standard, that are deactivated

when the device is powered down. This feature guarantees

no bus loading when V

CC = 0V. The bus port outputs also

have a control mode that either enables or disables the ac-

tive upper stage of the totem-pole configuration. When this

control input, denoted PE, is in the high state, the bus out-

puts operate in the high-speed totem-pole mode. When PE

is in the low state, the bus outputs operate as open collector

outputs which are necessary for parallel polling.

DS75161A

This device is also an 8-channel bi-directional transceiver

which is specifically configured to implement the eight man-

agement signal lines of the IEEE-488 bus. This device,

paired with the DS75160A, forms the complete 16-line inter-

face between the IEEE-488 bus and a single controller in-

strumentation system. In compliance with the system organi-

zation of the management signal lines, the SRQ, NDAC, and

NRFD bus port outputs are open collector. In contrast to the

DS75160A, these open collector outputs are a fixed configu-

ration. The direction control is divided into three groups. The

DAV, NDAC, and NRFD transceiver directions are controlled

by the TE input. The ATN, SRQ, REN, and IFC transceiver

directions are controlled by the DC input. The EOI trans-

ceiver direction is a function of both the TE and DC inputs, as

well as the logic level present on the ATN channel. The port

connections to the bus lines have internal terminators identi-

cal to the DS75160A.

DS005804-8

VC logic high = 3.0V

VC logic low = 0V

*CL includes jig and probe capacitance

FIGURE 1.

DS005804-9

VC logic high = 3.0V

VC logic low = 0V

*CL includes jig and probe capacitance

FIGURE 2.

Dual-In-Line Package

DS005804-2

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