EMC1403 datasheet(41/55 Pages) MICROCHIP

41 / 55 page

1°C Temperature Sensor with Beta Compensation

Data Sheet

 2014 Microchip Technology Inc.

DS20005272A-page 41

APPLICATION NOTE:

When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When

measuring 45nm Intel CPUs, the Ideality Setting should be 15h.

6.15

High Limit Status Register

The High Limit Status Register contains the status bits that are set when a temperature channel high

limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set.

Reading from the High Limit Status Register will clear all bits if. Reading from the register will also

clear the HIGH status bit in the Status Register.

The ALERT pin will be set if the programmed number of consecutive alert counts have been met and

any of these status bits are set.

The status bits will remain set until read unless the ALERT pin is configured as a comparator output

(see Section 5.3.2).

Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel exceeds its programmed high limit.

Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit.

Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit.

Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.

6.16

Low Limit Status Register

The Low Limit Status Register contains the status bits that are set when a temperature channel drops

below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.

11h

0.9986

21h

1.0200

31h

1.0408

12h

1.0000

22h

1.0213

32h

1.0421

13h

1.0013

23h

1.0226

33h

1.0434

14h

1.0026

24h

1.0239

34h

1.0447

15h

1.0039

25h

1.0252

35h

1.0460

16h

1.0053

26h

1.0265

36h

1.0473

17h

1.0066

27h

1.0278

37h

1.0486

Table 6.20 High Limit Status Register

ADDR.

R/W

DEFAULT

35h

R-C

High Limit

Status

E3HIGH

E2HIGH

E1HIGH

IHIGH

00h

Table 6.21 Low Limit Status Register

ADDR.

R/W

DEFAULT

36h

R-C

Low Limit

Status

E3LOW

E2LOW

E1LOW

ILOW

00h

Table 6.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued)

SETTING

FACTOR

SETTING

FACTOR

SETTING

FACTOR

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