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INA118P Datasheet(PDF) 19 Page - Texas Instruments

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Part # INA118P
Description  INA118 Precision, Low Power Instrumentation Amplifier
PDF  29 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

INA118P Datasheet(HTML) 19 Page - Texas Instruments

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background image
300
+3V
150
R
1
(1)
2V – DV
2V + DV
NOTE: (1) R
1 required to create proper common-mode voltage,
only for low voltage operation — see text.
3V
R
G
INA118
V
O
Ref
INA118
www.ti.com
SBOS027A – SEPTEMBER 2000 – REVISED JANUARY 2016
Single Supply Operation (continued)
Figure 35. Single-Supply Bridge Amplifier
10 Layout
10.1 Layout Guidelines
TI always recommends paying attention to good layout practices. For best operational performance of the device,
use good printed-circuit-board (PCB) layout practices, including:
•
Take care to ensure that both input paths are well-matched for source impedance and capacitance to avoid
converting common-mode signals into differential signals. In addition, parasitic capacitance at the gain-setting
pins can also affect CMRR over frequency. For example, in applications that implement gain switching using
switches or PhotoMOS® relays to change the value of RG, select the component so that the switch
capacitance is as small as possible.
•
Noise can propagate into analog circuitry through the power pins of the circuit as a whole, and of the device
itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources
local to the analog circuitry. Connect low-ESR, 0.1-
μF ceramic bypass capacitors between each supply pin
and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is
applicable for single-supply applications.
•
Separate grounding for analog and digital portions of the circuitry is one of the simplest and most effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current. For more detailed information, see
Circuit Board Layout Techniques (SLOA089).
•
To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better than in
parallel with the noisy trace.
•
Keep the traces as short as possible.
Copyright © 2000–2016, Texas Instruments Incorporated
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Product Folder Links: INA118



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