DS90CF383 Pin Description — FPD Link Transmitter

Pin Name

I/O

No.

Description

TxIN

I

28

TTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines — FPLINE,

FPFRAME and DRDY (also referred to as HSYNC, VSYNC, Data Enable).

TxOUT+

O

4

Positive LVDS differentiaI data output.

TxOUT−

O

4

Negative LVDS differential data output.

FPSHIFT IN

I

1

TTL Ievel clock input. The falling edge acts as data strobe. Pin name TxCLK IN.

TxCLK OUT+

O

1

Positive LVDS differential clock output.

TxCLK OUT−

O

1

Negative LVDS differential clock output.

PWR DOWN

I

1

TTL level input. When asserted (low input) TRI-STATES the outputs, ensuring low current at

power down.

V

CC

I

4

Power supply pins for TTL inputs.

DS100033-18

FIGURE 11. Transmitter Power Down Delay

DS100033-26

FIGURE 12. Transmitter LVDS Output Pulse Position Measurement

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