BCM8021

®

4-CHANNEL MULTIRATE 1.0–3.2-GBPS TRANSCEIVER WITH

HIGH-SPEED REDUNDANCY

Independent Quad SerDes Application Diagram

from 1.0 Gbps to 3.2 Gbps including 1.06 Gbps, 1.25 Gbps, 2.12

Gbps, 2.488 Gbps, 2.667 Gbps, 3.125 Gbps, and 3.1875 Gbps

• 4 Independent 1.0 to 3.2-Gbps SerDes transceivers

• IEEE 802.3ae compliant XAUI to XGMII transceiver

• XAUI-to-XAUI retiming

• Less than 300 mW per transceiver channel including I/O

• Less than 3 picoseconds rms jitter generation

• Exceeds SONET jitter tolerance mask

emphasis

• Tx pre-emphasis for interoperability with CML SerDes

• Rx equalization for copper interconnects

• Full loopback and on-chip PRBS generator/checker

• IEEE (1149.1) JTAG

• No requirement for heat sink or airflow

2× XAUI

2× XAUI

1× XGMII/TBI

1× XGMII/TBI

2

× XENPAK

Tx

Rx

Tx

Rx

BCM8702

BCM8702

ASIC/MAC

BCM8021

BCM8021

Gigabit Ethernet, 1× and 2× Fibre Channel, OC-48 SONET

(with/without FEC), Infiniband, 10-Gigabit Ethernet, 10-

Gigabit Fibre Channel, or others.

unparalleled performance while achieving the lowest possible

power consumption.

(PCS) has a selectable 8B/10B encoding/decoding block on-

chip that can be configured to support the 10-Gbps

Attachment Unit Interface (XAUI).

deserializing (SerDes) of data signals transmitted through

front panel or backplane networking equipment supporting

both primary and protection circuits.

clean-up circuit required.

(BIST), high-speed and low-speed loopbacks, and

programmable PRBS generator/checker.

multichannel linecard designs.

FE A T UR E S

SU MM AR Y O F B E N E FI TS