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EMC6D100 Datasheet(PDF) 39 Page - SMSC Corporation

Part # EMC6D100
Description  ENVIRONMENTAL MONITORING AND CONTROL DEVICE WITH AUTOMATIC FAN CAPABILITY
PDF  75 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

EMC6D100 Datasheet(HTML) 39 Page - SMSC Corporation

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Environmental Monitoring and Control Device
Datasheet
SMSC EMC6D100/EMC6D101
Page 39
Rev. 09-09-04
DATASHEET
Register
Address
Read/
Write
Register Name
Abbr.
Bit 7
(MSb) Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
Default
Value
Lock Start
6Dh
R/W Zone 1, Zone 2 Hysteresis
HY12
H1-3
H1-2
H1-1
H1-0
H2-3
H2-2
H2-1
H2-0
44h
Yes Yes
6Eh
R/W Zone 3, Hysteresis
HYS3
H3-3
H3-2
H3-1
H3-0
RES
RES
RES
RES
40h
Yes Yes
6Fh
R/W XOR Test Tree Enable
XORT
RES
RES
RES
RES
RES
RES
RES
XEN
00h
Yes Yes
70h
R
+3.3V Reading
V33R
7
6
5
4
3
2
1
0
NA
No
No
71h
R
+1.5 Reading
V15R
7
6
5
4
3
2
1
0
NA
No
No
72h
R
+1.8 Reading
V18R
7
6
5
4
3
2
1
0
NA
No
No
73h
R/W +3.3V Low Limit
V33L
7
6
5
4
3
2
1
0
00h
No
Yes
74h
R/W +3.3V High Limit
V33H
7
6
5
4
3
2
1
0
FFh
No
Yes
75h
R/W +1.5 Low Limit
V15L
7
6
5
4
3
2
1
0
00h
No
Yes
76h
R/W +1.5 High Limit
V15H
7
6
5
4
3
2
1
0
FFh
No
Yes
77h
R/W +1.8 Low Limit
V18L
7
6
5
4
3
2
1
0
00h
No
Yes
78h
R/W +1.8 High Limit
V18h
7
6
5
4
3
2
1
0
FFh
No
Yes
79h
R/W Test Mode Register
MOTR ANTST2 ANTST1 ANTST0 OSCSEL ADCAVG EXTCLK DIGTST ADCTST
00h
Yes Yes
7Ah
R
Error Debug Register
ERDR
RES
ARA
STOP
INVADD
RCV
ROWR
INVRW
NONAC
00h
No
No
7Bh
R/W Test Digital Value Register DVTR
7
6
5
4
3
2
1
0
00h
Yes Yes
7Ch
R/W
4
Special Function Register
SFTR
D2EN
D1EN
AVG
OFFCFG
VOLTEN
INTEN
MONMD
LPMD
E0h
Yes
4
Yes
4
7Dh
R-C
3
Interrupt Status Register 3
INT3
RES
RES
RES
RES
RES
33V
18V
15V
00h
No
No
7Eh
R/W Interrupt Enable
INTE
VCC
12V
5V
33V VCCP 25V
18V
15V
ECh
Yes Yes
7Fh
R/W Configuration
CONF
INIT
FTTST
RES
SUREN
TRDY
RES
P4INT
RES
10h
Yes Yes
80h
R/W
Fan Temp Interrupt
Enable
FTIE
RES
AMB TEMP FAN4 FAN3 FAN2 FAN1 FAN
5Eh
Yes Yes
81h
R/W
Fan Tach/PWM Interrupt
Select
FTIS
T4H
T4L
T3H
T3L
T2H
T2L
T1H
T1L
A4h
Yes Yes
82h
R/W Reserved
N/A
RES
RES
RES
RES
RES
RES
RES
RES
FFh
Yes
No
83h
R/W
Sync Pulse Configuration
Register: ON/OFF
FCF4
RES
RES
RES
ON
RES
RES
RES
RES
62h
Yes Yes
84h
R/W Reserved
N/A
RES
RES
RES
RES
RES
RES
RES
RES
03h
Yes Yes
85h
R/W Reserved
N/A
RES
RES
RES
RES
RES
RES
RES
RES
80h
Yes Yes
86h
R
Smooth Remote Diode
Reading 1
SRD1
7
6
5
4
3
2
1
0
N/A
No
No
87h
R
Smooth Ambient Reading
SAMR
7
6
5
4
3
2
1
0
N/A
No
No
88h
R
Smooth Remote Diode
Reading 2
SRD2
7
6
5
4
3
2
1
0
N/A
No
No
89h
R
ADC 2 LSB Test
ADTR
7
6
5
4
3
2
1
0
N/A
No
No
8Ah
R
Input Test Reg 1
CBI1
RES
6
5
4
3
2
1
0
4Dh
No
No
8Bh
R/W Output Test Reg 1
CBO1
7
6
5
4
3
2
1
0
4Dh
Yes Yes
8Ch
R
Input Test Reg 2
CBI2
RES
RES
RES
4
3
2
1
0
0Eh
No
No
8Dh
R/W Output Test Reg 2
CBO2
RES
RES
RES
4
3
2
1
0
0Eh
Yes Yes
Notes:
1.
The Fan x Current Duty Cycle Registers are only writeable when the associated fan is in manual
mode. In this case, the register is writeable when the start bit is set, but not when the lock bit is set.
2.
The Lock and Start bits in the Ready/Lock/Start register are locked by the Lock Bit. The OVRID bit is
always writeable, both when the start bit is set and when the lock bit is set.



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