PCM1730

SLES021 – NOVEMBER 2001

4

www.ti.com

6.5 V

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4 V

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±0.1 V

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Ground voltage differences: AGND1, AGND2, and DGND

±0.1 V

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Digital input voltage: LRCK, DATA, BCK, SCKI, DEMP0, DEMP1, FMT0, FMT1,

FMT2, RST, and MUTE

–0.3 V to 6.5 V

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Digital input voltage: ZEROL, ZEROR

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Analog input voltage:

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Input current (any pins except supplies)

±10 mA

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–40

°C to 125°C

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–55

°C to 150°C

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150

°C

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Lead temperature (soldering)

260

°C, 5 s

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Package temperature (IR reflow, peak)

235

°C, 10 s

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† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

PARAMETER

TEST CONDITIONS

PCM1730E

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RESOLUTION

24

Bits

DATA FORMAT

Audio data interface format

Standard, I2S, left justified

Audio data bit length

16, 20, 24-bits selectable

Audio data format

MSB first, 2’s complement

fS

Sampling frequency

10

200

kHz

System clock frequency

128, 192, 256, 384, 512, 768 fS

DIGITAL INPUT/OUTPUT

Logic family

TTL compatible

VIH

High-level input logic level

2

VDC

VIL

Low-level input logic level

0.8

VDC

IIH

Input logic current (see Note 1)

VIN = VDD

10

A

IIL

Input logic current (see Note 1)

VIN = 0 V

–10

µA

IIH

Input logic current (see Note 2)

VIN = VDD

65

100

A

IIL

Input logic current (see Note 2)

VIN = 0 V

–10

µA

VOH

High-level output logic level

IOH = –2 mA

2.4

VDC

VOL

Low-level output logic level

IOL = 2 mA

1

VDC

NOTES:

1. Pins 1, 4, 5, 6, 7, 12, 13, 14, and 15: RST, LRCK, DATA, BCK, SCKI, FMT0, FMT1, FMT2, and MUTE

2. Pins 10 and 11: DEMP0, DEMP1