 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ST72561 Datasheet(PDF) 63 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72561 Datasheet(HTML) 63 Page - STMicroelectronics |
|
|
63 / 262 page  ST72561 63/262 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK (Cont’d) Bit 0 = OIF Oscillator interrupt flag This bit is set by hardware and cleared by software reading the CSR register. It indicates when set that the main oscillator has reached the selected elapsed time (TB1:0). 0: Timeout not reached 1: Timeout reached CAUTION: The BRES and BSET instructions must not be used on the MCCSR register to avoid unintentionally clearing the OIF bit. Table 15. Main Clock Controller Register Map and Reset Values Address (Hex.) Register Label 76 54321 0 002Dh SICSR Reset Value 0 AVDIE AVDF LVDRF 0 00 WDGRF x 002Eh MCCSR Reset Value MCO 0 CP1 0 CP0 0 SMS 0 TB1 0 TB0 0 OIE 0 OIF 0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
