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TSB42AA4PDT Datasheet(PDF) 86 Page - Texas Instruments |
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TSB42AA4PDT Datasheet(HTML) 86 Page - Texas Instruments |
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86 / 183 page ![]() 5−21 default, the value of these registers is 0x0000 0000. All other bytes of the inserted H0 DIF block header are 0xFF. ceLynx automatically increments the ID0 DIF sequence number when the H0 block is automatically inserted. This sequence number is updated with every new sequence. The sequence counter is incremented every 25th packet. It rolls over when it reaches its maximum count, which is 9 (NTSC) and 11 (PAL). The next frame begins with the ID0 counter at zero. Byte Position H0 FF_FF_FF_ H0R3 H0R4 H0R5 H0R6 H0R7 ID0 ID1 ID2 ID FF 0 1 2 3 79 7 8 Figure 5−23. H0 DIF Block Header for DV Transmit When transmitting DV data in the header0 insert mode, ceLynx is not capable of resetting the ID1 DIF sequence number to 0 when the source stops and resumes its data transmission in the middle of the frame. The DIF sequence number starts its counter from the value conserved when the data source stops. As a result, ceLynx inserts the time stamp where the DIF sequence is offset. Use the following steps to correctly transmit DV data in the header0 insert mode. 1. Source turned off within a frame. 2. Wait until the TX buffer signals an empty. 3. Reset the TXDP. 4. Resume data transmission with a new frame. 5.5.3.1 HDDV (61883−3) ceLynx supports HDDV data in minimal form. ceLynx supports a H0,0 and H0,1 insertion mode. This mode is a simple derivative of the H0 insertion mode. The H0 data is inserted into both the H0,0 and H0,1 data locations. The customer has the option of disabling this feature. ceLynx supports the extended data length as defined by 61883-3 for HD-DVCR data. Both PAL and NTSC systems are supported. Time stamping is supported as it is for the standard DV modes. The burst DV algorithm is not supported for this data type. No hardware smoothing function inserts empty packets. Empty packets are only inserted when a complete packet is not available in the buffer. ceLynx also supports H0 DIF block insertion for HD-DVCR format. It inserts a 160-byte H0 DIF block. The first eight bytes of the H0 DIF block can be programmed by the host port in internal registers TXDP(N)H3 and TXDP(N)H4. The rest of the 160-byte header are all 0xFF. The ID0 sequence number is also automatically incremented for every new sequence whenever ceLynx automatically inserts the H0 DIF block header. HDDV has been verified in design simulation only. 5.5.3.2 DV Format (IEC 61883-2) Burst Input A burst input is defined as an input method that is limited only by the fullness of the transmit buffer. This method is commonly used when the application level hardware or software does not know how fast to input |
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