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PAM2842 Datasheet(PDF) 9 Page - Diodes Incorporated

Part # PAM2842
Description  HIGH POWER LED DRIVER
PDF  17 Pages
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Manufacturer  DIODES [Diodes Incorporated]
Direct Link  http://www.diodes.com
Logo DIODES - Diodes Incorporated

PAM2842 Datasheet(HTML) 9 Page - Diodes Incorporated

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PAM2842
Document number: DSxxxxx Rev. 1 - 2
9 of 17
www.diodes.com
October 2012
© Diodes Incorporated
PAM2842
A Product Line of
Diodes Incorporated
Application Information (cont.)
Inductor Selection (cont.)
For the sepic topology, L1 = L2
D
1
I
I
I
O
O
1
L
−
=
I
I
O
2
L =
V
V
V
D
O
IN
O
+
=
)
V
V
(
LF
V
V
I
O
IN
O
IN
L
+
=
Δ
Chose
1
L
L
I
4
.
0
I
=
Δ
so
)
V
V
(
FI
V
5
.
2
L
O
IN
O
2
IN
+
=
Capacitor Selection
An input capacitor is required to reduce the input ripple and noise for proper operation of the PAM2842. For good input decoupling, Low ESR
(equivalent series resistance) capacitors should be used at the input. At least 10µF input capacitor is recommended for most applications. And
close the IC VIN-PIN we should add a bypass capacitor, usually use a 1µF capacitor.
A minimum output capacitor value of 10µF is recommended under normal operating conditions, while a 22µF or higher capacitor may be
required for higher power LED current. A reasonable value of the output capacitor depends on the LED current. The total output voltage ripple
has two components: the capacitive ripple caused by the charging and discharging on the output capacitor, and the ohmic ripple due to the
capacitor's equivalent series resistance. The ESR of the output capacitor is the important parameter to determine the output voltage ripple of the
converter, so low ESR capacitors should be used at the output to reduce the output voltage ripple. The voltage rating and temperature
characteristics of the Output capacitor must also be considered. So a value of 10µF, 50V voltage rating capacitor is chosen.
Consider from discharge aspect: I x Δt = C x ΔV
In boost and sepic topology,
RIPPLE
O
O
FV
D
I
C =
In buck topology,
RIPPLE
O
O
FV
)
D
1
(
I
C
−
=
VRIPPLE : Output voltage allowable ripple.
Consider from equivalent series resistance:
VRIPPLE-ESR = ICO.RIPPLE x COESR
In sepic topology, there is a series capacitor Cs between L1 and L2 (see application schematic), it flows the current:
V
V
I
I
IN
O
O
)
RMS
(
CS
=
The ripple voltage is
S
O
CS
FC
D
I
V
=
Δ
The voltage rating must be higher than input voltage.
Because the Cs capacitor will flow the large RMS current, so this topology is suitable for small power application.



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