ADS5275IPFP datasheet(6/20 Pages) TI

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LVDS DIGITAL DATA AND CLOCK OUTPUTS

ADS5275

SBAS300 – JANUARY 2004 – REVISED NOVEMBER 2004

Test conditions at I

O = 3.5mA, RLOAD = 100Ω, and CLOAD = 9pF. All LVDS specifications are functionally tested, but not

parametrically tested.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

DC SPECIFICATIONS

Output Voltage High, OUTP or OUTN

RLOAD = 100Ω± 1%; See LVDS Timing Diagram,

1340

1475

VOH

Page 7

VOL Output Voltage Low, OUTP or OUTN

RLOAD = 100Ω± 1%

925

1038

|VOD| Output Differential Voltage

RLOAD = 100Ω± 1%

325

350

375

Output Offset Voltage

RLOAD = 100Ω± 1%; See LVDS Timing Diagram,

1.125

1.250

1.275

VOS

Page 7

RO Output Impedance, Single-Ended

VCM = 1.0V and 1.4V

TBD

Ω

∆R

Mismatch Between OUTP and OUTN

VCM = 1.0V and 1.4V

TBD

CO Output Capacitance

VCM = 1.0V and 1.4V

∆V

OD|

Change in |VOD| Between 0 and 1

RLOAD = 100Ω± 1%

∆V

Change Between 0 and 1

RLOAD = 100Ω± 1%

ISOUT Output Short-Circuit Current

Drivers Shorted to Ground

ISOUTNP Output Current

Drivers Shorted Together

|IXN|, |IXP| Power-Off Output Leakage

VCC = 0V

DRIVER AC SPECIFICATIONS

Clock Clock Signal Duty Cycle

× ADCLK

|tpHLP - tpLHN| or |tpHLN - tpHLP|,

tSKEW1

Any Differential Pair on Package(1)

Differential Skew

|tpDIFF[X] - tpDIFF[Y]|,

tSKEW2

Any Two Signals on Package(3)

100

Channel-to-Channel Skew(2)

tRISE/tFALL VOD Rise Time or VOD Fall Time

ZLOAD = 100Ω, CI = 9pF, IO = 2.5mA

400

ZLOAD = 100Ω, CI = 9pF, IO = 3.5mA

250

ZLOAD = 100Ω, CI = 9pF, IO = 4.5mA

200

ZLOAD = 100Ω, CI = 9pF, IO = 6.0mA

150

(1)

Skew measurements are made at the 50% point of the transistion.

(2)

Where x is any one of the parallel channels and y is any other channel.

(3)

Skew measurements made at 0V differential (that is, the crossing of single-ended signals).

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