NCP434, NCP435

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FUNCTIONAL DESCRIPTION

Overview

The NCP434 − NCP435 are high side P channel MOSFET

power distribution switch designed to isolate ICs connected

on the battery in order to save energy. The part can be turned

on, with a range of battery from 1.0 V to 4 V.

Enable Input

Enable pin is an active high. The path is opened when EN

pin is tied low (disable), forcing P MOS switch off.

1.0 V and EN forced to high level.

Auto Discharge (NCP435 Only)

NMOS FET is placed between the output pin and GND,

in order to discharge the application capacitor connected on

OUT pin.

The auto−discharge is activated when EN pin is set to low

level (disable state).

The discharge path ( Pull down NMOS) stays activated as

In order to limit the current across the internal discharge

NMOSFET, the typical value is set at 65

W.

IN and OUT, 1

mF, at least, capacitors must be placed as

close as possible the part for stability improvement.

APPLICATION INFORMATION

Power Dissipation

Main contributor in term of junction temperature is the

power dissipation of the power MOSFET. Assuming this,

the power dissipation and the junction temperature in

normal mode can be calculated with the following

equations:

P

I

OUT

2

= Power dissipation (W)

= Power MOSFET on resistance (

W)

= Output current (A)

T

= Junction temperature (

°C)

= Package thermal resistance (

°C/W)

= Ambient temperature (

°C)

PCB Recommendations

The NCP434 − NCP435 integrate an up to 2 A rated

PMOS FET, and the PCB design rules must be respected to

properly evacuate the heat out of the silicon. By increasing

the package can be decreased, allowing higher power

dissipation.

Figure 15. Routing Example 1 oz, 2 Layers, 100

5C/W