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DA6001 Datasheet(PDF) 1 Page - Dialog Semiconductor

Part # DA6001
Description  Highly integrated power and Clock supply IC for new
PDF  3 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA6001 Datasheet(HTML) 1 Page - Dialog Semiconductor

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DA6001
Highly integrated power and Clock supply IC for new
generation Intel® Atom™ processor
The DA6001 is a highly integrated system controller, designed to support the Intel® Atom™
Z5xx series platform. The DA6001 provides all power supplies, power management and clock
supplies in a single chip, and has been optimized to deliver enhanced power efficiency to the
platform.
Integrated power management
Sourcing Dialog Semiconductor’s DA6001 with a single supply voltage the device provides, low
noise supplies to all platform voltage domains and provides current to supply additional system
DDR2 memory as well as the firmware hub memory.
The DA6001 integrates six high performance low dropout (LDO) voltage regulators using Dialog’s
patented Smart Mirror™ technology. This ensures very low quiescent current consumption and high
power supply rejection, removing the need for a low power mode and simplifying power control in
the system.
Dialog Semiconductors DA6001 includes a high efficiency DC-DC buck controller which is designed
according to Intel® Atom™ processor IMVP-6 specification, providing the core voltage to the CPU
via its external FETs. The enhanced Intel SpeedStep technology is controlled via the voltage ID
(VID) interface. A fully integrated high efficiency DC-DC buck converter sources the hardware
engines of the Intel Atom platform. A third high efficiency DC-DC buck converter with external FETs
provides high current to the SCH core and the FSB of the Intel® Atom™ platform. A further DC-DC
buck converter with external FETs provides energy to the internal as well as to the external system
memory.
The DA6001 also provides the reference mid voltage for proper
DDR2 operation. It also includes a push-pull source to terminate
DDR2 address or data memory lines if necessary.
Being input voltage independent, a charge pump is integrated to
generate the 5V domain even if the input voltage drops below 5V.
The power domain architecture has been carefully optimized to
deliver enhanced power efficiency to the processor at lowest
power dissipation, thereby maximizing battery life time and
reducing thermal impact.


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