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LM1237AAF/NA Datasheet(PDF) 31 Page - National Semiconductor (TI) |
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LM1237AAF/NA Datasheet(HTML) 31 Page - National Semiconductor (TI) |
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31 / 42 page  Control Register Definitions (Continued) Frame Control Register 2 Register Name (address): FRMCTRL2 (0x8401) 20023436 Bits 4–0 Blinking Period. These five bits set the blinking period of the blinking feature, which is determined by mulitiplying the value of these bits by 8, and then multiplying the result by the vertical field rate. Bits 7–5 Pixels per Line. These three bits determine the number of pixels per line of OSD characters per the following table which also lists the maximum horizontal scan rate recommended for each setting. Bits 7–5 Description Max Horizontal Frequency (kHz) 0x0 512 pixels per line 125 0x1 576 pixels per line 119 0x2 640 pixels per line 112 0x3 704 pixels per line 106 0x4 768 pixels per line 100 0x5 832 pixels per line 93 0x6 896 pixels per line 87 0x7 960 pixels per line 81 www.national.com 31 |
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