TUSB321 datasheet(14/24 Pages) TI1

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TUSB321

SLLSEO6B – JUNE 2015 – REVISED SEPTEMBER 2016

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Typical Application (continued)

8.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 4:

Table 4. Design Requirements for DFP Mode

DESIGN PARAMETER

VALUE

VDD (4.5 V to 5.5 V)

5 V

Type-C port type (UFP, DFP, or DRP)

DFP

PORT pin is pulled up

Advertised Type-C Current (Default, 1.5 A, 3.0 A)

3.0 A

VCONN Support

Yes

8.2.1.2 Detailed Design Procedure

The TUSB321 device supports a VDD in the range of 4.5 to 5.5 V. In this particular case, VDD is set to 5 V. A 100-

nF capacitor is placed near VDD. Also, a 100 µF is used to meet the USB Type-C bulk capacitance requirement

of 10 µF to 220 µF.

The TUSB321 current advertisement is determined by the state of the CURRENT_MODE pin. In this particular

example, 3.0 A advertisement is desired so the CURRENT_MODE pin is pulled high to VDD through 10-kΩ

resistor.

The DIR pin is used to control the MUX for connecting the USB3 SS signals to the appropriate pins on the USB

Type-C receptacle. In this particular case, a HD3SS3212 is used as the MUX. In order to minimize crossing in

routing the USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB321 is

swapped.

The Type-C port mode is determined by the state of the PORT pin. When the PORT pin is pulled high, the

TUSB321 device is in DFP mode.

The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This

large resistor is required to protect the TUSB321 device from large VBUS voltage that is possible in present day

systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB321 device in the

recommended range.

The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the

TUSB321 device in a DFP mode, a bulk capacitance of at least 120 µF is required. In this particular case, a 150-

µF capacitor was chosen.

8.2.1.3 Application Curve

Figure 5. Application Curve for DFP Mode

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