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TPS65130 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS65130 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 29 page ![]() www.ti.com DESCRIPTION (CONTINUED) ABSOLUTE MAXIMUM RATINGS DISSIPATION RATINGS TABLE (1) TPS65130, TPS65131 SLVS493B – MARCH 2004 – REVISED SEPTEMBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. The converter operates with a fixed frequency PWM control topology and, if power-save mode is enabled, it uses a pulse-skipping mode at light load currents. It operates with only 500-µA device quiescent current. Independent enable pins allow power up and power down sequencing for both outputs. The device has an internal current limit overvoltage protection and a thermal shutdown for highest reliability under fault conditions. ORDERING INFORMATION TA SWITCH CURRENT LIMIT PART NUMBER(1) BOOST CONVERTER INVERTING CON- VERTER –40 °C to 85°C 800 mA 800 mA TPS65130RGE –40 °C to 85°C 1950 mA 1950 mA TPS65131RGE (1) The RGE package is availabletaped and reeled. Add an R suffix to the device type (i.e., TPS65130RGER) toorder quantities of 3000 devices per reel. It is also available in minireels. Add a T suffix to the device type (i.e., TPS65130RGET) toorder quantities of 250 devices per reel. over operating free-air temperature range unless otherwise noted(1) TPS65130/1 VIN, INN Input voltage range at pins (2) –0.3 V to +6.0 V VPOS Maximum voltage at pin (2) 17 V VNEG Minimum voltage at pin (2) –17 V Voltage at pins ENN, ENP, FBP, FBN, CN, CP, PSP, PSN, BSW (2) –0.3 V to VIN + 0.3 V INP Input voltage at pin (2) 17 V Differential voltage between pins OUTN to VINN(2) 24 V TJ Operating virtual junction temperature –40 °C to 150°C TSTG Storage temperature range –65 °C to 150°C (1) Stresses beyond those listedunder "absolute maximum ratings” may cause permanent damage to thedevice. These are stress ratings only, and functional operation of the deviceat these or any other conditions beyond those indicated under "recommendedoperating conditions” is not implied. Exposure to absolute-maximum-ratedconditions for extended periods may affect device reliability. (2) All voltage values are withrespect to network ground terminal, unless otherwisenoted. DERATING FACTOR TA = 70°C TA = 85°C TA≤ 25°C PACKAGE Θ JA Θ JB Θ JC ABOVE TA = 25°C POWER RATING POWER POWER RATING RATING RGE 37.8 °C/W 27.8 °C/W 57.9 °C/W 2646 mW 26 mW/ °C 1455 mW 1058 mW (1) This thermal data is based on assembly of the device on a JEDEC high K board. The PowerPAD must be soldered on a pad on the board. There must be vias within the pad that contact the ground plane in the PCB. Exceeding the maximum junctiontemperature will force the device into thermalshutdown. 2 |
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