LM13600M datasheet(15/24 Pages) NSC

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Voltage Controlled Oscillators (Continued)

Figure 18 shows how to build a VCO using one amplifier

when the other amplifier is needed for another function.

Additional Applications

Figure 19 presents an interesting one-shot which draws no

power supply current until it is triggered. A positive-going trig-

ger pulse of at least 2V amplitude turns on the amplifier

through R

B and pulls the non-inverting input high. The ampli-

fier regenerates and latches its output high until capacitor C

charges to the voltage level on the non-inverting input. The

output then switches low, turning off the amplifier and dis-

charging the capacitor. The capacitor discharge rate is in-

creased by shorting the diode bias pin to the inverting input

so that an additional discharge current flows through D

when the amplifier output switches low. A special feature of

this timer is that the other amplifier, when biased from V

can perform another function and draw zero stand-by power

as well.

The operation of the multiplexer of

Figure 20 is very straight-

forward. When A1 is turned on it holds V

O equal to VIN1 and

when A2 is supplied with bias current then it controls V

O.CC

and R

C serve to stabilize the unity-gain configuration of am-

plifiers A1 and A2. The maximum clock rate is limited to

about 200 kHz by the LM13600 slew rate into 150 pF when

the (V

IN1-VIN2) differential is at its maximum allowable value

of 5V.

The Phase-Locked Loop of

Figure 21 uses the four-quadrant

multiplier of

Figure 6 and the VCO of Figure 18 to produce a

PLL with a ±5% hold-in range and an input sensitivity of

about 300 mV.

DS007980-24

FIGURE 17. Sinusoidal VCO

DS007980-25

FIGURE 18. Single Amplifier VCO

DS007980-26

FIGURE 19. Zero Stand-By Power Timer

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