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AT89C51RC-24AI Datasheet(PDF) 9 Page - ATMEL Corporation |
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AT89C51RC-24AI Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 37 page ![]() 9 AT89C51RC 1920B–MICRO–11/02 Memory Organization MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89C51RC, if EA is connected to V CC, program fetches to addresses 0000H through 7FFFH are directed to internal memory and fetches to addresses 8000H through FFFFH are to external memory. Data Memory The AT89C51RC has internal data memory that is mapped into four separate segments: the lower 128 bytes of RAM, upper 128 bytes of RAM, 128 bytes special function regis- ter (SFR) and 256 bytes expanded RAM (ERAM). The four segments are: 1. The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly addressable. 2. The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only. 3. The Special Function Registers, SFRs, (addresses 80H to FFH) are directly addressable only. 4. The 256-byte expanded RAM (ERAM, 00H-FFH) is indirectly accessed by MOVX instructions, and with the EXTRAM bit cleared. The Lower 128 bytes can be accessed by either direct or indirect addressing. The Upper 128 bytes can be accessed by indirect addressing only. The Upper 128 bytes occupy the same address space as the SFR. This means they have the same address, but are physically separate from the SFR space. When an instruction accesses an internal location above address 7FH, the CPU knows whether the access is to the upper 128 bytes of data RAM or to SFR space by the addressing mode used in the instruction. Instructions that use direct addressing access SFR space. For example: MOV 0A0H, # data Table 3b. AUXR1: Auxiliary Register 1 AUXR1 Address = A2H Reset Value = XXXXXXX0B Not Bit Addressable –– – – – – – DPS Bit 7 6 5 4 3 2 1 0 – Reserved for future expansion DPS Data Pointer Register Select DPS 0 Selects DPTR Registers DP0L, DP0H 1 Selects DPTR Registers DP1L, DP1H |
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